ISP1562BEUM ST-Ericsson Inc, ISP1562BEUM Datasheet - Page 14

• Manufacturer Part Number: ISP1562BEUM
• Description: IC USB HOST CTRL HI-SPD 100LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1562BEUM

• Applications: USB Host/Function Processor
• Interface: EHCI Interface
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 100-LQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ISP1562BE-T; ISP1562BE-T

NXP Semiconductors
Table 3.
ISP1562_2
Product data sheet
Address Bits 31 to 24
PCI configuration header registers
00h
04h
08h
PCI configuration space registers of OHCI1, OHCI2 and EHCI
8.1.1 PCI configuration space
8.1.2 PCI initiator and target
8.2 PCI configuration registers
STATUS[15:0]
DID[15:0]
Each function has its own configuration space. The PCI enumerator must allocate the
memory address space for each of these functions. Power management is implemented
in each PCI function and all power states are provided. This allows the system to achieve
low power consumption by switching off the functions that are not required.
PCI Local Bus Specification Rev. 2.2 requires that each of the three PCI functions of the
ISP1562 provides its own PCI configuration registers, which can vary in size. In addition to
the basic PCI configuration header registers, these functions implement capability
registers to support power management.
The registers of each of these functions are accessed by the respective driver.
provides a detailed description of various PCI configuration registers.
A PCI initiator initiates PCI transactions to the PCI bus. A PCI target responds to PCI
transactions as a slave. In the ISP1562, two Open Host Controllers and the enhanced
Host Controller function as both initiators or targets of PCI transactions issued by the host
CPU.
All USB Host Controllers have their own operational registers that can be accessed by the
system driver software. Drivers use these registers to configure the Host Controller
hardware system, issue commands to it, and monitor the status of the current hardware
operation. The Host Controller plays the role of a PCI target. All operational registers of
the Host Controllers are the PCI transaction targets of the CPU.
Normal USB transfers require the Host Controller to access system memory fields, which
are allocated by USB HCDs and PCI drivers. The Host Controller hardware interacts with
the HCD by accessing these buffers. The Host Controller works as an initiator in this case
and becomes a PCI master.
OHCI USB Host Controllers and the EHCI USB Host Controller contain two sets of
software-accessible hardware registers: PCI configuration registers and memory-mapped
Host Controller registers.
A set of configuration registers is implemented for each of the three PCI functions of the
ISP1562, see
Remark: In addition to the normal PCI header, from offset index 00h to 3Fh,
implementation-specific registers are defined to support power management and
function-specific features.
Bits 23 to 16
CC[23:0]
Table
Bits 15 to 8
3.
Rev. 02 — 1 March 2007
CMD[15:0]
VID[15:0]
Bits 7 to 0
REVID[7:0]
Func0 OHCI1 Func1 OHCI2
1561 1131h
0210 0000h
0C03 1011h
1561 1131h
0210 0000h
0C03 1011h
HS USB PCI Host Controller
Reset value
© NXP B.V. 2007. All rights reserved.
[1]
ISP1562
Func2 EHCI
1562 1131h
0210 0000h
0C03 2011h
Section 8.2
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