AN983BLX-BG-T-V1 Infineon Technologies, AN983BLX-BG-T-V1 Datasheet - Page 86

• Manufacturer Part Number: AN983BLX-BG-T-V1
• Description: IC PCI TO ETHERNET LAN 128-FQFP
• Manufacturer: Infineon Technologies

Specifications of AN983BLX-BG-T-V1

• Applications: Ethernet Controller
• Interface: USB
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 128-BFQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: AN983BLXBGTV1; SP000076446

Table 17
Mode
Latch low,
mask clearing
Interrupt high,
self clearing
Interrupt low,
self clearing
Interrupt high,
mask clearing
Interrupt low,
mask clearing
Interrupt enable
register
latch_on_reset
Read/write
self clearing
9.3.1
Register 0
MII Control
R0
Register 0(MII Control)
Field
RESET
LOOP
Data Sheet
Registers Access Types (cont’d)
PHY Transceiver Registers Descriptions
Bits
15
14
Symbol Description Hardware (HW)
llmk
ihsc
ilsc
ihmk
ilmk
ien
lor
rwsc
Latch high signal at low-level, register
cleared on read
Differentiate the input signal (low-
>high) register cleared on read
Differentiate the input signal (high-
>low) register cleared on read
Differentiate the input signal (high-
>low) register cleared with written mask
Differentiate the input signal (low-
>high) register cleared with written
mask
Enables the interrupt source for
interrupt generation
rw register, value is latched after first
clock cycle after reset
Register is used as input for the hw, the
register will be cleared due to a HW
mechanism.
Type
rwsc
rw
Registers and Descriptors DescriptionPHY Registers(Accessed by CSR9
Description
Reset
0
1
Loopback
0
1
B
B
B
B
, normal operation
, PHY Reset
, disable loopback
, enable loopback
Offset
0
86
H
Description Software (SW)
SW can read the register, with write mask
the register can be cleared (1 clears)
SW can read the register
SW can read the register
SW can read the register, with write mask
the register can be cleared
SW can read the register, with write mask
the register can be cleared
SW can read and write this register
Register is read and writable by SW
Writing to the register generates a strobe
signal for the HW (1 pdi clock cycle)
Register is readable and writable by SW.
Rev. 1.81, 2005-12-15
AN983B/BX
Reset Value
1000
H