AN983BX-BG-T-V3 Infineon Technologies, AN983BX-BG-T-V3 Datasheet - Page 94

• Manufacturer Part Number: AN983BX-BG-T-V3
• Description: IC PCI TO ETHERNET LAN 128-PQFP
• Manufacturer: Infineon Technologies

Specifications of AN983BX-BG-T-V3

• Applications: Ethernet Controller
• Interface: USB
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 128-BFQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: AN983BXBGTV3; SP000103413

9.4
Table 18
Register Short Name
RDES0
RDES1
RDES2
RDES3
TDES0
TDES1
TDES2
TDES3
The register is addressed wordwise.
Standard abbreviations:
Table 19
Mode
read/write
read
write
read/write
hardware
affected
Read only
Read virtual
Latch high,
self clearing
Latch low,
self clearing
Latch high,
mask clearing
Latch low,
mask clearing
Data Sheet
Descriptors and Buffer Management
Registers Overview
Registers Access Types
Symbol Description Hardware (HW)
rw
r
w
rwh
rwv
ro
rv
lhsc
llsc
lhmk
llmk
Register Long Name
RDES0
RDES1
RDES2
RDES3
TDES0
TDES1
TDES2
TDES3
Register is used as input for the HW
Register is written by HW (register
between input and output -> one cycle
delay)
Register can be modified by HW
Register is set by HW (register between
input and output -> one cycle delay)
Physically, there is no new register, the
input of the signal is connected directly
to the address multiplexer.
Latch high signal at high level, clear on
read
Latch high signal at low-level, clear on
read
Latch high signal at high level, register
cleared with written mask
Latch high signal at low-level, register
cleared on read
Registers and Descriptors DescriptionDescriptors and Buffer Management
94
Description Software (SW)
Register is readable and writable by SW
Value written by software is ignored by
hardware; that is, software may write any
value to this field without affecting hardware
behavior (= Target for development.)
Register is writable by SW
Register can be modified by HW, but the
priority SW versus HW has to be specified
SW can only read this register
SW can only read this register
SW can read the register
SW can read the register
SW can read the register, with write mask
the register can be cleared (1 clears)
SW can read the register, with write mask
the register can be cleared (1 clears)
00
04
08
Offset Address
0Ch
00
04
08
0Ch
H
H
H
H
H
H
H
H
Rev. 1.81, 2005-12-15
Page Number
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AN983B/BX