74LVC2G66GT,115 NXP Semiconductors, 74LVC2G66GT,115 Datasheet - Page 18
![IC SWITCH DUAL SPST 8XSON](/photos/6/94/69486/8-xson_sml.jpg)
74LVC2G66GT,115
Manufacturer Part Number
74LVC2G66GT,115
Description
IC SWITCH DUAL SPST 8XSON
Manufacturer
NXP Semiconductors
Series
74LVCr
Type
Analog Switchr
Datasheet
1.74LVC2G66GM125.pdf
(26 pages)
Specifications of 74LVC2G66GT,115
Package / Case
8-XFDFN
Function
Switch
Circuit
2 x SPST - NO
On-state Resistance
6 Ohm
Voltage Supply Source
Single Supply
Voltage - Supply, Single/dual (±)
1.65 V ~ 5.5 V
Current - Supply
0.1µA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Switch Configuration
SPST
On Resistance (max)
34 Ohm (Typ) @ 1.95 V
On Time (max)
4.6 ns (Typ) @ 1.95 V
Off Time (max)
3.8 ns (Typ) @ 1.95 V
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Power Dissipation
250 mW
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Switch Current (typ)
0.0001 mA @ 5.5 V
Package
8XSON
Maximum On Resistance
195@1.95V Ohm
Maximum Propagation Delay Bus To Bus
0.8(Typ)@1.95V|0.4(Typ)@2.7V|0.3(Typ)@3.6V|0.2(Typ)@5.5V ns
Maximum Low Level Output Current
50 mA
Maximum Turn-off Time
3.8(Typ)@1.95V ns
Maximum Turn-on Time
4.6(Typ)@1.95V ns
Switch Architecture
SPST
Power Supply Type
Single
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-4652-2
74LVC2G66GT-G
74LVC2G66GT-G
935280087115
74LVC2G66GT-G
74LVC2G66GT-G
935280087115
NXP Semiconductors
12. Package outline
Fig 26. Package outline SOT505-2 (TSSOP8)
74LVC2G66
Product data sheet
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
UNIT
mm
VERSION
OUTLINE
SOT505-2
max.
1.1
A
0.15
0.00
A 1
8
1
0.95
0.75
A 2
y
pin 1 index
IEC
e
Z
0.25
A 3
D
0.38
0.22
b p
b p
All information provided in this document is subject to legal disclaimers.
5
0
0.18
0.08
4
JEDEC
c
- - -
w
REFERENCES
D
3.1
2.9
M
(1)
Rev. 5 — 16 June 2010
E
3.1
2.9
(1)
c
JEITA
scale
0.65
2.5
e
A
H E
4.1
3.9
A 2
A 1
0.5
L
H E
E
5 mm
0.47
0.33
detail X
L p
0.2
v
L
L p
PROJECTION
EUROPEAN
0.13
w
A
(A 3 )
74LVC2G66
0.1
y
X
v
θ
M
0.70
0.35
Z
© NXP B.V. 2010. All rights reserved.
A
(1)
Bilateral switch
ISSUE DATE
02-01-16
8°
0°
θ
SOT505-2
18 of 26