TMP86C993XB(EYZ) Toshiba, TMP86C993XB(EYZ) Datasheet - Page 57

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TMP86C993XB(EYZ)

Manufacturer Part Number
TMP86C993XB(EYZ)
Description
EMULATION CHIP FOR TMP86F SSOP
Manufacturer
Toshiba
Series
-r
Datasheet

Specifications of TMP86C993XB(EYZ)

Accessory Type
Adapter
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
TMP86F SSOP
Other names
TMP86C993XB
TMP86C993XB
3.5
3.6
3.4.2
generated when the CPU fetches such a code and tries to execute it. INTUNDEF is accepted even if non-maskable
interrupt is in process. Contemporary process is broken and INTUNDEF interrupt process starts, soon after it is
requested.
trap interrupt (INTATRAP). INTATRAP is accepted even if non-maskable interrupt is in process. Contemporary
process is broken and INTATRAP interrupt process starts, soon after it is requested.
Undefined Instruction Interrupt (INTUNDEF)
Address Trap Interrupt (INTATRAP)
Taking code which is not defined as authorized instruction for instruction causes INTUNDEF. INTUNDEF is
Fetching instruction from unauthorized area for instructions (Address trapped area) causes reset output or address
Note:The undefined instruction interrupt (INTUNDEF) forces CPU to jump into vector address, as software interrupt
Note:The operating mode under address trapped, whether to be reset output or interrupt processing, is selected on
and an address error is detected. The address error detection range can be further expanded by writing FFH to
unused areas of the program memory. Address trap reset is generated in case that an instruction is fetched from
RAM, DBR or SFR areas.
address.
Debugging
Debugging efficiency can be increased by placing the SWI instruction at the software break point setting
(SWI) does.
watchdog timer control register (WDTCR).
Page 43
TMP86FH92DMG

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