DC1297B Linear Technology, DC1297B Datasheet - Page 7

• Manufacturer Part Number: DC1297B
• Description: BOARD EVAL LTM4612
• Manufacturer: Linear Technology
• Series: µModuler

Specifications of DC1297B

• Design Resources: LTM4612 Spice Model LTM4612 Gerber Files DC1297B Design Files DC1297B Schematic
• Main Purpose: DC/DC, Step Down
• Outputs And Type: 1, Non-Isolated
• Power - Output: -
• Voltage - Output: 3.3V, 5V ,12V
• Current - Output: 5A
• Voltage - Input: 5 ~ 36 V
• Regulator Topology: Buck
• Frequency - Switching: 850kHz
• Board Type: Fully Populated
• Utilized Ic / Part: LTM4612
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

pin FuncTions
V
tween these pins and PGND pins. Recommend placing
input decoupling capacitance directly between V
and PGND pins.
PGND (Bank 2): Power Ground Pins for Both Input and
Output Returns.
V
between these pins and PGND pins. Recommend placing out-
put decoupling capacitance directly between these pins and
GND pins (see the LTM4612 Pin Configuration below).
V
citors between V
current and reduce the input ripple further.
DRV
to INTV
can be biased up to 6V from an external supply with about
50mA capability. This improves efficiency at higher input
voltages by reducing power dissipation in the module.
INTV
the 5V internal regulator.
PLLIN (Pin A8): External Clock Synchronization Input to the
Phase Detector. This pin is internally terminated to SGND
with a 50k resistor. Apply a clock above 2V and below
INTV
OUT
IN
D
(Pins B7, C7): Top FET Drain Pins. Add more capa-
(Bank 1): Power Input Pins. Apply input voltage be-
CC
CC
CC
(Bank 3): Power Output Pins. Apply output load
(Pins C10, E11, E12): These pins normally connect
. See the Applications Information section.
CC
(Pin A7): This pin is for additional decoupling of
for powering the internal MOSFET drivers. They
D
and ground to handle the input RMS
(See Package Description for Pin Assignments)
BANK 1
BANK 2
BANK 3
PGND
V
OUT
V
IN
A
B
C
D
E
F
G
H
J
K
L
M
1
133-LEAD (15mm × 15mm × 2.8mm)
2
LTM4612 Pin Configuration
3
IN
4
pins
LGA PACKAGE
TOP VIEW
5 6
7
V
8
FCB (Pin M12): Forced Continuous Input. Connect this pin
to SGND to force continuous synchronization operation at
low load, to INTV
tion at low load or to a resistive divider from a secondary
output when using a secondary winding.
TRACK/SS (Pin A9): Output Voltage Tracking and Soft-Start
Pin. When the module is configured as a master output,
then a soft-start capacitor is placed on this pin to ground
to control the master ramp rate. A soft-start capacitor can
be used for soft-start turn-on as a standalone regulator.
Slave operation is performed by putting a resistor divider
from the master output to the ground, and connecting the
center point of the divider to this pin. See the Applications
Information section.
MPGM (Pins A12, B11): Programmable Margining In-
put. A resistor from these pins to ground sets a current
that is equal to 1.18V/R. This current multiplied by 10k
will equal a value in millivolts that is a percentage of the
0.6V reference voltage. May be left open if margining is
not desired. See the Applications Information section. To
parallel LTM4612s, each requires an individual MPGM
resistor. Do not tie MPGM pins together.
f
900kHz at 12V Output. An external resistor can be placed
from this pin to ground to increase frequency. See the
Applications Information section for frequency adjustment.
D
SGND
SET
9
10 11
(Pin B12): Frequency Set Internally to ~850kHz to
12
f
MARG0
MARG1
DRV
V
PGOOD
SGND
NC
NC
NC
FCB
SET
FB
CC
CC
to enable discontinuous mode opera-
LTM4612
4612fb
7