OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 3

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OM13013,598

Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Datasheets

Specifications of OM13013,598

Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
NXP Semiconductors
1. Product identification
2. Errata overview
Table 2.
Table 3.
Table 4.
ES_LPC122X
Errata sheet
Functional
problems
ADC.1
RTC.1
AC/DC
deviations
n/a
Errata notes
n/a
Functional problems table
AC/DC deviations table
Errata notes table
Short description
PIO0_2, PIO1_5 trigger sources do not operate
properly
Self-timed wakeup from Deep-Sleep requires WDOsc
Short description
n/a
Short description
n/a
The LPC122x devices typically have the following top-side marking:
The last letter in the last line (field ‘R’) will identify the device revision. This Errata Sheet
covers the following revisions of the LPC122x:
Table 1.
Field ‘YY’ states the year the device was manufactured. Field ‘WW’ states the week the
device was manufactured during that year.
Revision identifier (R)
‘-’
LPC122x
/xxx
xxxxxxx
xxYYWWxR[x]
Device revision table
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 1 May 2011
Revision description
Initial device revision
Revision identifier
‘-’
‘-’
Product version(s)
n/a
Revision identifier
n/a
Errata sheet LPC1224/25/26/27
ES_LPC122x
Detailed description
Section 3.1
Section 3.2
Detailed description
n/a
Detailed description
n/a
© NXP B.V. 2011. All rights reserved.
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