SI4705-D60-EVB Silicon Laboratories Inc, SI4705-D60-EVB Datasheet - Page 36

• Manufacturer Part Number: SI4705-D60-EVB
• Description: BOARD EVALUATION FOR SI4705-D60
• Manufacturer: Silicon Laboratories Inc
• Series: -r
• Type: Receiverr

Specifications of SI4705-D60-EVB

• Frequency: 64MHz ~ 108MHz
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: SI4705

Si4704/05-D60
9.2. Si4704/05-D60 SSOP
Figure 15 illustrates the PCB land pattern details for the Si4704/05-D60-GU SSOP. Table 18 lists the values for the
dimensions shown in the illustration.
36
General:
Solder Mask Design:
Stencil Design:
Card Assembly:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This land pattern design is based on the IPC-7351 guidelines.
3. All metal pads are to be non-solder mask defined (NSMD). Clearance between the
4. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should
5. The stencil thickness should be 0.125 mm (5 mils).
6. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.
7. A No-Clean, Type-3 solder paste is recommended.
8. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification
solder mask and the metal pad is to be 60 µm minimum, all the way around the pad.
be used to assure good solder paste release.
for Small Body Components.
Dimension
Y1
C
E
X
Table 18. PCB Land Pattern Dimensions
Figure 15. PCB Land Pattern
Rev. 1.0
5.20
0.30
1.50
Min
0.635 BSC
Max
5.30
0.40
1.60