A2F200M3F-FGG484 Actel, A2F200M3F-FGG484 Datasheet - Page 103
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A2F200M3F-FGG484
Manufacturer Part Number
A2F200M3F-FGG484
Description
ACLA2F200M3F-FGG484 SMART FUSION MIX SIG
Manufacturer
Actel
Datasheet
1.A2F500M3B-1CSH484.pdf
(170 pages)
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Inter-Integrated Circuit (I
Table 2-98 • I
Parameter
V
V
V
I
I
V
T
T
Cin
R
R
D
t
t
t
t
t
t
Notes:
1. These maximum values are provided for information only. Minimum output buffer resistance values depend on
2. These values are provided for a load of 100 pF and 400 pF. For board design considerations and detailed output buffer
3. For allowable Pclk configurations, refer to the Inter-Integrated Circuit (I
IL
IH
LOW
HIGH
HD;STA
SU;STA
HD;DAT
SU;DAT
IL
IH
OL
hyst
FALL
RISE
pull-up
pull-down
max
VCCxxxxIOBx, drive strength selection, temperature, and process. For board design considerations and detailed output
buffer
http://www.actel.com/download/ibis/default.aspx.
resistances,
http://www.actel.com/download/ibis/default.aspx.
Microcontroller Subsystem User’s
Commercial Case Conditions: T
resistances,
Minimum input low voltage
Maximum input low voltage
Minimum input high voltage
Maximum input high voltage
Maximum output voltage low
Input current high
Input current low
Hysteresis of Schmitt trigger
inputs
Fall time
Rise time
Pin capacitance
Output buffer maximum pull-
down Resistance
Output buffer maximum pull-up
Resistance
Maximum data rate
Low period of I2C_x_SCL
High period of I2C_x_SCL
START hold time
START setup time
DATA hold time
DATA setup time
This section describes the DC and switching of the I
characteristics given are for a 100 pF load on the pins. For timing parameter definitions, refer to
48 on page
2
C Characteristics
use
2
2
Definition
1
2-92.
the
use
3
3
3
1
3
corresponding
the
Guide.
3
3
corresponding
J
2
= 85ºC, V
C) Characteristics
VIHmin to VILMax, C
VIHmin to VILMax, C
VILMax to VIHmin, C
VILMax to VIHmin, C
IBIS
VIN = 0, f = 1.0 MHz
IBIS
DD
R e v i s i o n 3
models
I
Fast mode
Condition
= 1.425 V, –1 Speed Grade
OL
= 8 mA
models
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
2
C interface. Unless otherwise noted, all output
load
load
load
load
located
Actel SmartFusion Intelligent Mixed Signal FPGAs
= 400 pF
= 100 pF
= 400pF
= 100pF
2
located
C) Peripherals section in the
on
on
SeeTable 2-35 on
page 2-32
See
See
See
See
See
See
See
the
page 2-31
Table 2-32 on
the
Table 2-35
Table 2-35
Table 2-35
Table 2-35
Table 2-35
Table 2-35
Value
15.0
19.5
150
400
4.0
5.2
8.0
50
1
1
1
1
1
1
Actel
Actel
website
website
SmartFusion
pclk cycles
pclk cycles
pclk cycles
pclk cycles
pclk cycles
pclk cycles
Figure 2-
Kbps
Unit
pF
ns
ns
ns
ns
Ω
Ω
V
–
–
–
–
–
–
–
2- 91
at
at
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