AFBR-79E4Z Avago Technologies US Inc., AFBR-79E4Z Datasheet - Page 2

• Manufacturer Part Number: AFBR-79E4Z
• Description: 56T4986
• Manufacturer: Avago Technologies US Inc.

Specifications of AFBR-79E4Z

• Applications: Gigabit Ethernet
• Data Rate Max: 10.3125Gbps
• Supply Voltage: 3.3V
• Wavelength Typ: 850nm
• Lead Free Status / Rohs Status: Compliant

Transmitter
The optical transmitter portion of the transceiver (see
Figure 1) incorporates a 4-channel VCSEL (Vertical Cavity
Surface Emitting Laser) array, a 4-channel input buffer and
laser driver, diagnostic monitors, control and bias blocks.
The transmitter is designed for IEC-60825 and CDRH eye
safety compliance; Class 1M out of the module. The Tx
Input Buffer provides CML compatible differential inputs
presenting a nominal differential input impedance of
100 Ohms. AC coupling capacitors are located inside the
QSFP+ module and are not required on the host board. For
module control and interrogation, the control interface
(LVTTL compatible) incorporates a Two Wire Serial (TWS)
interface of clock and data signals. Diagnostic monitors
for VCSEL bias, module temperature, and module power
supply voltage are implemented and results are available
through the TWS interface.
Alarm and warning thresholds are established for
the monitored attributes. Flags are set and interrupts
generated when the attributes are outside the thresholds.
Flags are also set and interrupts generated for loss of input
signal (LOS) and transmitter fault conditions. All flags are
latched and will remain set even if the condition initiating
the latch clears and operation resumes. All interrupts can
be masked and flags are reset by reading the appropriate
flag register. The optical output will squelch for loss of
input signal unless squelch is disabled. Fault detection
or channel deactivation through the TWS interface will
disable the channel. Status, alarm/warning and fault infor-
mation are available via the TWS interface. To reduce the
need for polling, the hardware interrupt signal is provided
to inform hosts of an assertion of alarm, warning, LOS and/
or Tx fault.
2
Figure 1. Transceiver Block Diagram
Din[4:1][p/n] (8)
Dout[4:1][p/n] (8)
ModPresL
LPMode
ModSelL
ResetL
SDA
SCL
IntL
RX Output Buffer
TX Input Buffer
4 Channels
4 Channels
Control
Laser Driver
4 Channels
4 Channels
Diagnostic
Monitors
TIA
Receiver
The optical receiver portion of the transceiver (see
Figure 1) incorporates a 4-channel PIN photodiode array, a
4-channel TIA array, a 4 channel output buffer, diagnostic
monitors, and control and bias blocks. The Rx Output
Buffer provides CML compatible differential outputs for
the high speed electrical interface presenting nominal sin-
gle-ended output impedances of 50 Ohms to AC ground
and 100 Ohms differentially that should be differentially
terminated with 100 Ohms. AC coupling capacitors are
located inside the QSFP+ module and are not required
on the host board. Diagnostic monitors for optical input
power are implemen-ted and results are available through
the TWS interface.
Alarm and warning thresholds are established for the
monitored attributes. Flags are set and interrupts gene-
rated when the attributes are outside the thresholds. Flags
are also set and interrupts generated for loss of optical
input signal (LOS). All flags are latched and will remain
set even if the condition initiating the flag clears and
operation resumes. All interrupts can be masked and flags
are reset upon reading the appropriate flag register. The
electrical output will squelch for loss of input signal (unless
squelch is disabled) and channel de-activation through
TWS interface. Status and alarm/warning information are
available via the TWS interface. To reduce the need for
polling, the hardware interrupt signal is provided to inform
hosts of an assertion of alarm, warning and/or LOS.
High Speed Electrical Signal Interface
Figure 2 shows the interface between an ASIC/SerDes
and the QSFP+ module. For simplicity, only one channel
is shown. The high speed signal lines are AC-coupled 100
Ohm differential lines. The AC coupling is inside the QSFP+
module and not required on the host board. The 100 Ohm
differential terminations are inside the QSFP+ module for
the transmitter lines and at the host ASIC/SerDes for the
Receiver lines.