ADC101S021EVAL National Semiconductor, ADC101S021EVAL Datasheet - Page 2

• Manufacturer Part Number: ADC101S021EVAL
• Manufacturer: National Semiconductor

Specifications of ADC101S021EVAL

• Lead Free Status / Rohs Status: Not Compliant

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ANALOG I/O
DIGITAL I/O
POWER SUPPLY
Pin No.
Block Diagram
Pin Descriptions and Equivalent Circuits
PAD
3
4
5
6
1
2
Symbol
SDATA
SCLK
GND
GND
V
CS
V
IN
A
Analog input. This signal can range from 0V to V
Digital clock input. This clock directly controls the conversion and readout processes.
Digital data output. The output samples are clocked out of this pin on falling edges of the SCLK pin.
Chip select. On the falling edge of CS, a conversion process begins.
Positive supply pin. This pin should be connected to a quiet +2.7V to +5.25V source and bypassed to
GND with a 1 µF capacitor and a 0.1 µF monolithic capacitor located within 1 cm of the power pin.
The ground return for the supply and signals.
For package suffix CISD(X) only, it is recommended that the center pad should be connected to ground.
2
Description
A
.
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