ADC10DL065EVAL National Semiconductor, ADC10DL065EVAL Datasheet - Page 9

• Manufacturer Part Number: ADC10DL065EVAL
• Manufacturer: National Semiconductor

Specifications of ADC10DL065EVAL

• Lead Free Status / Rohs Status: Not Compliant

Specification Definitions
APERTURE DELAY is the time after the rising edge of the
clock to when the input signal is acquired or held for conver-
sion.
APERTURE JITTER (APERTURE UNCERTAINTY) is the
variation in aperture delay from sample to sample. Aperture
jitter manifests itself as noise in the output.
CLOCK DUTY CYCLE is the ratio of the time during one
cycle that a repetitive digital waveform is high to the total
time of one period. The specification here refers to the ADC
clock input signal.
COMMON MODE VOLTAGE (V
age applied to both input terminals of the ADC.
CONVERSION LATENCY is the number of clock cycles
between initiation of conversion and when that data is pre-
sented to the output driver stage. Data for any given sample
is available at the output pins the Pipeline Delay plus the
Output Delay after the sample is taken. New data is available
at every clock cycle, but the data lags the conversion by the
pipeline delay.
CROSSTALK is coupling of energy from one channel into
the other channel.
DIFFERENTIAL NON-LINEARITY (DNL) is the measure of
the maximum deviation from the ideal step size of 1 LSB.
EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE
BITS) is another method of specifying Signal-to-Noise and
Distortion or SINAD. ENOB is defined as (SINAD - 1.76) /
6.02 and says that the converter is equivalent to a perfect
ADC of this (ENOB) number of bits.
FULL POWER BANDWIDTH is a measure of the frequency
at which the reconstructed output fundamental drops 3 dB
below its low frequency value for a full scale input.
GAIN ERROR is the deviation from the ideal slope of the
transfer function. It can be calculated as:
Gain Error can also be separated into Positive Gain Error
and Negative Gain Error, which are:
GAIN ERROR MATCHING is the difference in gain errors
between the two converters divided by the average gain of
the converters.
INTEGRAL NON LINEARITY (INL) is a measure of the
deviation of each individual code from a line drawn from
negative full scale (
through positive full scale (
transition). The deviation of any given code from this straight
line is measured from the center of that code value.
INTERMODULATION DISTORTION (IMD) is the creation of
additional spectral components as a result of two sinusoidal
frequencies being applied to the ADC input at the same time.
It is defined as the ratio of the power in the intermodulation
products to the total power in the original frequencies. IMD is
usually expressed in dBFS.
LSB (LEAST SIGNIFICANT BIT) is the bit that has the
smallest value or weight of all bits. This value is V
where “V
resolution in bits.
MISSING CODES are those output codes that will never
appear at the ADC outputs. The ADC10DL065 is guaranteed
not to have any missing codes.
Gain Error = Positive Full Scale Error − Negative Full
NGE = Offset Error − Negative Full Scale Error
PGE = Positive Full Scale Error − Offset Error
FS
” is the full scale input voltage and “n” is the ADC
1
⁄
2
LSB below the first code transition)
Scale Error
1
⁄
2
CM
LSB above the last code
) is the common d.c. volt-
FS
/2
n
,
9
MSB (MOST SIGNIFICANT BIT) is the bit that has the
largest value or weight. Its value is one half of full scale.
NEGATIVE FULL SCALE ERROR is the difference between
the actual first code transition and its ideal value of
above negative full scale.
OFFSET ERROR is the difference between the two input
voltages [(V
code 2047 to 2048.
OUTPUT DELAY is the time delay after the rising edge of
the clock before the data update is presented at the output
pins.
OVER RANGE RECOVERY TIME is the time required after
V
range to a specified voltage within the normal input range
and the converter makes a conversion with its rated accu-
racy.
PIPELINE DELAY (LATENCY) See CONVERSION LA-
TENCY.
POSITIVE FULL SCALE ERROR is the difference between
the actual last code transition and its ideal value of 1
below positive full scale.
POWER SUPPLY REJECTION RATIO (PSRR) is a mea-
sure of how well the ADC rejects a change in the power
supply voltage. For the ADC10DL065, PSRR is the ratio of
the change in Full-Scale Error that results from a change in
the d.c. power supply voltage, expressed in dB.
SIGNAL TO NOISE RATIO (SNR) is the ratio, expressed in
dB, of the rms value of the input signal to the rms value of the
sum of all other spectral components below one-half the
sampling frequency, not including harmonics or d.c.
SIGNAL TO NOISE PLUS DISTORTION (S/N+D or SINAD)
Is the ratio, expressed in dB, of the rms value of the input
signal to the rms value of all of the other spectral compo-
nents below half the clock frequency, including harmonics
but excluding d.c.
SPURIOUS FREE DYNAMIC RANGE (SFDR) is the differ-
ence, expressed in dB, between the rms values of the input
signal and the peak spurious signal, where a spurious signal
is any signal present in the output spectrum that is not
present at the input.
TOTAL HARMONIC DISTORTION (THD) is the ratio, ex-
pressed in dB, of the rms total of the first nine harmonic
levels at the output to the level of the fundamental at the
output. THD is calculated as
where f
frequency and f
9 harmonic frequencies in the output spectrum.
SECOND HARMONIC DISTORTION (2ND HARM) is the
difference expressed in dB, between the RMS power in the
input frequency at the output and the power in its 2nd
harmonic level at the output.
THIRD HARMONIC DISTORTION (3RD HARM) is the dif-
ference, expressed in dB, between the RMS power in the
input frequency at the output and the power in its 3rd har-
monic level at the output.
IN
goes from a specified voltage out of the normal input
1
is the RMS power of the fundamental (output)
IN
+) – (V
2
through f
IN−
)] required to cause a transition from
10
are the RMS power of the first
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1
1
⁄
⁄
2
2
LSB
LSB