NOIS1SM0250A-HHC ON Semiconductor, NOIS1SM0250A-HHC Datasheet - Page 8

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NOIS1SM0250A-HHC

Manufacturer Part Number
NOIS1SM0250A-HHC
Description
Manufacturer
ON Semiconductor
Datasheet

Specifications of NOIS1SM0250A-HHC

Lead Free Status / Rohs Status
Supplier Unconfirmed
DC Operating Conditions
Table 6. DC Specifications
Notes
V
V
V
V
V
V
V
V
V
V
V
1. All parameters are characterized for DC conditions after establishing thermal equilibrium.
2. Unused inputs must always be tied to an appropriate logic level, for example, either VDD or GND.
3. This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. Take normal precautions to avoid applying any voltages
DD_ANA
DD_DIG
DD_ADC_ANA
DD_ADC_DIG
DD_ADC_DIG_3.3/5
IH
IL
OH
OL
DD_PIX
DD_RESL
higher than the maximum rated voltages to this high impedance circuit.
Symbol
Analog supply voltage to imager part
Digital supply voltage to imager part
Analog supply voltage to ADC
Digital supply voltage to ADC
Supply voltage of ADC output stage
Logical '1' input voltage
Logical '0' input voltage
Logical '1' output voltage
Logical '0' output voltage
Pixel array power supply (default 5 V, the device is then
in ‘soft reset’. To avoid the image lag associated with soft
reset, reduce this voltage to 3–3.5 V ‘hard reset’)
Reset power supply
Parameter
Rev. 7 | www.onsemi.com | Page 8 of 22
[1,2,3]
4.25
Min
2.3
0
3.3 to 5
Typ
4.5
0.1
5
5
5
5
5
5
NOIS1SM0250A
Max
V
1
1
DD
Units
V
V
V
V
V
V
V
V
V
V
V

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