74LV4053PW,118 NXP Semiconductors, 74LV4053PW,118 Datasheet - Page 19
![IC MUX/DEMUX TRIPLE 2X1 16TSSOP](/photos/6/56/65607/568-16-tssop_sot403-1_sml.jpg)
74LV4053PW,118
Manufacturer Part Number
74LV4053PW,118
Description
IC MUX/DEMUX TRIPLE 2X1 16TSSOP
Manufacturer
NXP Semiconductors
Series
74LVr
Type
Analog Multiplexerr
Datasheet
1.74LV4053BQ115.pdf
(26 pages)
Specifications of 74LV4053PW,118
Package / Case
16-TSSOP (0.173", 4.40mm Width)
Function
Multiplexer/Demultiplexer
Circuit
3 x 2:1
On-state Resistance
165 Ohm
Voltage Supply Source
Single Supply
Voltage - Supply, Single/dual (±)
2.7 V ~ 3.6 V
Current - Supply
80µA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Channels
3 Channel
On Resistance (max)
180 Ohms
On Time (max)
125 ns
Off Time (max)
95 ns
Supply Voltage (max)
6 V
Supply Voltage (min)
1 V
Maximum Power Dissipation
400 mW
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Switches
3
Package
16TSSOP
Maximum On Resistance
435@2V Ohm
Maximum Propagation Delay Bus To Bus
25(Typ)@1.2V|9(Typ)@2V|6(Typ)@2.7V|5(Typ)@3.3V|4(Typ)@4.5V|3(Typ)@6V ns
Maximum Low Level Output Current
25 mA
Multiplexer Architecture
2:1
Maximum Turn-off Time
95(Typ)@1.2V ns
Maximum Turn-on Time
125(Typ)@1.2V ns
Power Supply Type
Single
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74LV4053PW-T
74LV4053PW-T
935174970118
74LV4053PW-T
935174970118
NXP Semiconductors
11. Package outline
Fig 23. Package outline SOT38-4 (DIP16)
74LV4053_4
Product data sheet
DIP16: plastic dual in-line package; 16 leads (300 mil)
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
inches
UNIT
mm
VERSION
OUTLINE
SOT38-4
max.
0.17
4.2
A
L
min.
0.02
0.51
A
Z
1
1
16
pin 1 index
max.
0.13
A
3.2
IEC
2
0.068
0.051
1.73
1.30
b
e
0.021
0.015
0.53
0.38
b
1
JEDEC
D
0.049
0.033
1.25
0.85
b
REFERENCES
2
0
Rev. 04 — 10 August 2009
b
0.014
0.009
0.36
0.23
c
JEITA
scale
19.50
18.55
D
0.77
0.73
5
(1)
9
8
b
1
6.48
6.20
0.26
0.24
E
A
(1)
Triple single-pole double-throw analog switch
b
1
2
w
A
E
10 mm
2.54
M
2
0.1
e
A
7.62
0.3
e
1
3.60
3.05
0.14
0.12
c
L
PROJECTION
EUROPEAN
(e )
M
M
8.25
7.80
0.32
0.31
M
H
1
E
E
10.0
0.39
0.33
M
8.3
74LV4053
H
© NXP B.V. 2009. All rights reserved.
ISSUE DATE
0.254
0.01
95-01-14
03-02-13
w
SOT38-4
max.
0.76
0.03
Z
(1)
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