LFE2-50E-5FN672C Lattice, LFE2-50E-5FN672C Datasheet - Page 16
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LFE2-50E-5FN672C
Manufacturer Part Number
LFE2-50E-5FN672C
Description
IC FPGA 50KLUTS 500I/O 672-BGA
Manufacturer
Lattice
Datasheet
1.LFE2-12E-5FN256C.pdf
(385 pages)
Specifications of LFE2-50E-5FN672C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Lattice Semiconductor
Secondary Clock/Control Sources
LatticeECP2/M devices derive secondary clocks (SC0 through SC7) from eight dedicated clock input pads and the
rest from routing. Figure 2-11 shows the secondary clock sources.
Figure 2-11. Secondary Clock Sources
Clock Input
Clock Input
From Routing
From Routing
From Routing
From Routing
Routing
Routing
From
From
Routing
Routing
From
From
Secondary Clock Sources
Clock
Clock
Input
Input
2-13
Clock
Clock
Input
Input
Routing
Routing
From
From
LatticeECP2/M Family Data Sheet
Routing
Routing
From
From
From Routing
From Routing
From Routing
From Routing
Clock Input
Clock Input
Architecture
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