N25Q128A13ESF40F NUMONYX, N25Q128A13ESF40F Datasheet - Page 126
N25Q128A13ESF40F
Manufacturer Part Number
N25Q128A13ESF40F
Description
NUMN25Q128A13ESF40F 128MB SPI FLASH MEMO
Manufacturer
NUMONYX
Datasheet
1.N25Q128A13BSF40G.pdf
(180 pages)
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9.2.20
9.2.21
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Write NV Configuration Register
The Write Non Volatile Configuration register (WRNVCR) instruction allows new values to
be written to the Non Volatile Configuration register. Before it can be accepted, a write
enable (WREN) instruction must previously have been executed.
Apart form the parallelizing of the instruction code and the input data on the two pins DQ0
and DQ1, the instruction functionality is exactly the same as the Write Non Volatile
Configuration Register (WNVCR) instruction of the Extended SPI protocol, please refer to
Section 9.1.29: Write NV Configuration Register
Figure 63. Write NV Configuration Register instruction sequence DIO-SPI
Read Volatile Configuration Register
The Read Volatile Configuration Register (RDVCR) instruction allows the Volatile
Configuration Register to be read. See
DQ0
DQ1
C
S
0
Instruction
1
2
3
7
6
Table 5.: Volatile Configuration
4
LS Byte
5
4
5
Byte
3
2
6
for further details.
NVCR In
1
0
7
15 13 11 9
14 12 10 8
8
MS Byte
9 10 11
Byte
Dual_Write_NVCR
Register.