M25P32-VMW6G Micron Technology Inc, M25P32-VMW6G Datasheet - Page 21

• Manufacturer Part Number: M25P32-VMW6G
• Manufacturer: Micron Technology Inc

Specifications of M25P32-VMW6G

• Cell Type: NOR
• Density: 32Mb
• Access Time (max): 8ns
• Interface Type: Serial (SPI)
• Address Bus: 1b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: SO W
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 4M
• Supply Current: 12mA
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / Rohs Status: Compliant

6.1
Table 4.
Write Enable (WREN)
The Write Enable (WREN) instruction
The Write Enable Latch (WEL) bit must be set prior to every Page Program (PP), Sector
Erase (SE), Bulk Erase (BE) and Write Status Register (WRSR) instruction.
The Write Enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
Figure 8.
FAST_READ
Instruction
WREN
WRSR
RDSR
READ
WRDI
RDID
RES
DP
PP
SE
BE
Instruction set
Write Enable (WREN) instruction sequence
Write Enable
Write Disable
Read Identification
Read Status Register
Write Status Register
Read Data bytes
Read Data bytes at higher
speed
Page Program
Sector Erase
Bulk Erase
Deep Power-down
Release from Deep Power-
down, and Read Electronic
Signature
Release from Deep Power-
down
S
C
D
Q
Description
High Impedance
0
(Figure
1
2
One-byte instruction
Instruction
0000 0100
0000 0101
0000 0001
0000 0010
0000 0110
0000 0011
0000 1011
1101 1000
1011 1001
1010 1011
1001 1111
1100 0111
3
8) sets the Write Enable Latch (WEL) bit.
4
code
5
6
7
ABh
9Fh
0Bh
D8h
C7h
B9h
06h
04h
05h
01h
03h
02h
Address
AI02281E
bytes
0
0
0
0
0
3
3
3
3
0
0
0
0
Dummy
bytes
0
0
0
0
0
0
1
0
0
0
0
3
0
1 to 256
1 to 20
bytes
1 to ∞
1 to ∞
1 to ∞
1 to ∞
Data
0
0
1
0
0
0
0
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