M25P32-VMW6G Micron Technology Inc, M25P32-VMW6G Datasheet - Page 24
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M25P32-VMW6G
Manufacturer Part Number
M25P32-VMW6G
Description
Manufacturer
Micron Technology Inc
Datasheet
1.M25P32-VMW6G.pdf
(53 pages)
Specifications of M25P32-VMW6G
Cell Type
NOR
Density
32Mb
Access Time (max)
8ns
Interface Type
Serial (SPI)
Address Bus
1b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
SO W
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
4M
Supply Current
12mA
Mounting
Surface Mount
Pin Count
8
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M25P32-VMW6G
Manufacturer:
ST
Quantity:
12 000
Part Number:
M25P32-VMW6G
Manufacturer:
ST
Quantity:
20 000
Figure 10. Read Identification (RDID) instruction sequence and data-out sequence
6.4
6.4.1
6.4.2
6.4.3
24/54
Read Status Register (RDSR)
The Read Status Register (RDSR) instruction allows the Status Register to be read. The
Status Register may be read at any time, even while a Program, Erase or Write Status
Register cycle is in progress. When one of these cycles is in progress, it is recommended to
check the Write In Progress (WIP) bit before sending a new instruction to the device. It is
also possible to read the Status Register continuously, as shown in
Table 6.
The status and control bits of the Status Register are as follows:
WIP bit
The Write In Progress (WIP) bit indicates whether the memory is busy with a Write Status
Register, Program or Erase cycle. When set to 1, such a cycle is in progress, when reset to
0 no such cycle is in progress.
WEL bit
The Write Enable Latch (WEL) bit indicates the status of the internal Write Enable Latch.
When set to 1 the internal Write Enable Latch is set, when set to 0 the internal Write Enable
Latch is reset and no Write Status Register, Program or Erase instruction is accepted.
BP2, BP1, BP0 bits
The Block Protect (BP2, BP1, BP0) bits are non-volatile. They define the size of the area to
be software protected against Program and Erase instructions. These bits are written with
the Write Status Register (WRSR) instruction. When one or more of the Block Protect (BP2,
Status Register Write Protect
SRWD
b7
Status Register format
0
0
BP2
BP1
Block Protect bits
Write Enable Latch bit
BP0
Figure
WEL
Write In Progress bit
11.
WIP
b0