SI2434-D-FT Silicon Laboratories Inc, SI2434-D-FT Datasheet - Page 19
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SI2434-D-FT
Manufacturer Part Number
SI2434-D-FT
Description
IC ISOMODEM SYSTEM-SIDE 24TSSOP
Manufacturer
Silicon Laboratories Inc
Specifications of SI2434-D-FT
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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2.2.2. Interface Signal Description
The following tables describe each set of UART, parallel and SPI interface signals:
2.2.3. UART Interface Operation
The UART interface allows the host processor to communicate with the modem controller through a UART driver.
In this mode, the modem is analogous to an external “box” modem. The interface pins are 5 V tolerant and
communicate with TTL-compatible, low-voltage CMOS levels. RS232 interface chips, such as those used on the
modem evaluation board, can be used to make the UART interface directly compatible with a PC or terminal serial
port.
2.2.3.1. UART Options
The DTE rate is set by the autobaud feature after reset. When autobaud is disabled, the UART is configured to
19.2 kbps, 8-bit data, no parity and 1 stop bit on reset. The UART data rate is programmable from 300 bps to
307.2 kbps with the AT\Tn command (see Table 42, “Extended AT\ Command Set,” on page 81). After the AT\Tn
command is issued, the ISOmodem echoes the result code at the old DTE rate. After the result code is sent, all
subsequent communication is at the new DTE rate.
The DTE baud clock is within the modem crystal tolerance (typically ±50 ppm), except for DTE rates that are
uneven multiples of the modem clock. All DTE rates are within the +1%/–2.5% required by the V.14 specification.
Table 18 shows the ideal DTE rate, the actual DTE rate, and the approximate error.
Signal
D[7:0]
Signal
Signal
SCLK
MISO
MOSI
WR
INT
RD
TXD
RXD
CTS
CS
RTS
A0
INT
SS
Bidirectional Parallel data bus
Direction
Output
Direction
Direction
Input
Input
Input
Input
Output
Output
Output
Output
Input
Input
Input
Input
Input
Register selection (address input)
Chip select (active low)
Read enable (active low)
Write enable (active low)
Interrupt (active low)
Serial data clock
Serial data output
Serial data input
Chip select (active low)
Interrupt (active low)
Data input from host TXD pin
Data output to host RXD pin
Active-low request-to-send input for flow control
Clear to send: Si2493 is ready to receive data on the TXD pin (active low)
Table 17. Parallel-Interface Signals
Table 15. UART-Interface Signals
Table 16. SPI-Interface Signals
Rev. 1.3
Description
Description
Description
AN93
19
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