SI2434-D-FT Silicon Laboratories Inc, SI2434-D-FT Datasheet - Page 56
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SI2434-D-FT
Manufacturer Part Number
SI2434-D-FT
Description
IC ISOMODEM SYSTEM-SIDE 24TSSOP
Manufacturer
Silicon Laboratories Inc
Specifications of SI2434-D-FT
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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5. Modem Reference Guide
This section provides information about the architecture of the modem, its functional blocks, its registers, and their
interactions. The AT command set is presented, and options are explained. The accessible memory locations (S
registers and U registers) are described. Instructions for writing to and reading from them are discussed along with
any limitations or special considerations. A large number of configuration and programming examples are offered
as illustrations of actual testable applications. These examples can be used alone or in combination to create the
desired modem operation. The use of S registers and U registers to control the operation, features, and
configuration of the modem is documented.
The Si24xx ISOmodem chipset family is controller-based. No modem driver is required to run on the system
processor. This makes the Si24xx ISOmodem family ideal for embedded systems because a wide variety of
processors and operating systems can interface with the ISOmodem through a simple UART driver.
The modems in this family operate at maximum connect rates of 48 kbps upstream/V.92 (Si2494/93), 56 kbps
downstream/V.90 (Si2457), 33.6 kbps/V.34 (Si2439/34), 14.4 kbps/V.32b (Si2415), and 2400 bps/ V.22b (Si2404)
with support for all standard ITU-T fallback modes. These chipsets can be programmed to comply with FCC, JATE,
ETSI ES 203 021 and other country-specific PTT requirements. They also support V.42 and MNP2–4 error
correction and V.42b and MNP5 compression. “Fast connect” and “transparent HDLC” modes are also supported.
The basic ISOmodem functional blocks are shown in Figure 1 on page 1. The ISOmodem includes a controller,
data pump (DSP), ROM, RAM, an oscillator, phase-locked loop (PLL), timer, UART interface, a parallel interface
option, an SPI interface option, and a DAA interface. An optional voice mode is supported through an SSI interface
and an external Si3000 voice codec. The modem software is permanently stored in the on-chip ROM. Only modem
setup information (other than defaults) and other software updates need to be stored on the host or optional
external EEPROM and downloaded to the on-chip RAM during initialization. There is no nonvolatile on-chip
memory other than program ROM.
The following memory notation conventions are followed in this document:
5.1. Controller
The controller provides several vital functions, including AT command parsing, DAA control, connect sequence
control, DCE (data communication equipment) protocol control, intrusion detection, parallel phone off-hook
detection, escape control, Caller ID control and formatting, ring detection, DTMF (dual tone multi-frequency)
control, call progress monitoring, error correction, and data compression. The controller also writes to the control
registers that configure the modem. Virtually all interaction between the host and the modem is done via the
controller. The controller uses AT (ATtention) commands, S registers, and U registers to configure and control the
modem.
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Single-variable U registers are identified in this document as the register type (i.e., U) followed by the register’s
hexadecimal address and finally the register identifier in parenthesis, e.g. U4A (RGFD). Once the full register
reference is made, continuing discussion refers to the register name to simplify the text. The address and value
of a single variable U register are always read from or written to the ISOmodem in hexadecimal.
Bit-mapped U registers are identified in this document at the top level as the register type (i.e., U) followed by
the register’s hexadecimal address and finally the register identifier in parenthesis, e.g. U67 (ITC1). Once the
full register reference is made, continuing discussion of the register at the top level refers to the register name
to simplify the text. The address and value of a bit-mapped U register is always read from or written to the
ISOmodem in hexadecimal.
Bits within bit-mapped registers are identified in this document as the register type (i.e., U) followed by the
register’s hexadecimal address, the bit or bit range within the register in brackets, and finally the bit or bit range
identifier in parenthesis. Example: U67 [6] (OHS) or U67 [3:2] (] (DCT). Once the full register reference is made,
continuing discussion of the bits or bit range refers to the bit or bit range name to simplify the text. The bit or bit
range inside the bracket represents the actual bit or bit range within the register. The value of a bit or bit range
is presented in binary for clarity. However, the address and value of a bit-mapped U register is always read from
or written to the ISOmodem in hexadecimal.
ISOmodem S registers are identified with a decimal address (e.g., S38), and the number stored in an S register
is also a decimal value.
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