AT49LW040-33JC Atmel, AT49LW040-33JC Datasheet - Page 14

• Manufacturer Part Number: AT49LW040-33JC
• Manufacturer: Atmel

Specifications of AT49LW040-33JC

• Cell Type: NOR
• Density: 4Mb
• Access Time (max): 30ns
• Interface Type: Parallel/Serial
• Boot Type: Top
• Address Bus: 4/11Bit
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 85C
• Package Type: PLCC
• Program/erase Volt (typ): 3 to 3.6V
• Sync/async: Async/Sync
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 512K
• Supply Current: 67mA
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / Rohs Status: Not Compliant

Command Definitions in (Hex)
Notes:
14
Command Sequence
Read Array/Reset
Main Sector Erase
Parametric/Boot Sector Erase
(32-/16-/8-Kbyte Sector)
Byte Program
Product ID Entry
Read Status Register
Clear Status Register
1. X = Any valid address within the device
2. The sector must not be write locked when attempting sector erase or program operations. Attempts to issue a sector erase
3. SA = Sector address. Any byte address within a sector can be used to designate the sector address (see page 11).
4. Either 40H or 10H is recognized as the program setup.
5. Following the Product ID Entry command, read operations access manufacture and device ID. See Table 11.
6. AID = Address used to read data for manufacture or device ID
7. Sector number seven (located at the highest address space) is internally made up of four sectors. The size and the location
8. SRD = Data Read from Status Register.
AT49LW040
or byte program to a write locked sector will fail.
of the four sectors is shown below:
When sector erase command 20H is used, the four sectors are treated as one large 64K sector, and all four of the above
sectors will be erased. In certain applications, users may desire to have the flexibility to have additional smaller sectors. An
alternative sector erase command (21H), parametric/boot sector erase, can be used to erase any one of the four sectors
mentioned above. It is important to note that when the TBL pin is held low, it will protect all four of the sectors mentioned
above. Moreover, there is only one general-purpose register which will control the write/read status of the entire 64-Kbyte
region.
(2)(4)
(5)
SA7
SA8
SA9
SA10
(2)(3)
(2)(3)(7)
16-Kbyte
8-Kbyte
8-Kbyte
32-Kbyte
Bus Cycles
1
2
2
2
2
2
1
70000 - 73FFF
74000 - 75FFF
76000 - 77FFF
78000 - 7FFFF
Operation
Write
Write
Write
Write
Write
Write
Write
XXXX
XXXX
XXXX
XXXX
Addr
Addr
SA
SA
1st Bus Cycle
40 or 10
Data
FF
20
21
90
70
50
Operation
Write
Write
Write
Read
Read
XXXX
AID
Addr
Addr
SA
SA
2nd Bus Cycle
(6)
3342A–FLASH–6/03
SRD
Data
D
D
D0
D0
OUT
IN
(8)