AT49LV010-12JC Atmel, AT49LV010-12JC Datasheet - Page 3
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AT49LV010-12JC
Manufacturer Part Number
AT49LV010-12JC
Description
Manufacturer
Atmel
Datasheet
1.AT49LV010-12JC.pdf
(14 pages)
Specifications of AT49LV010-12JC
Cell Type
NOR
Density
1Mb
Access Time (max)
120ns
Interface Type
Parallel
Boot Type
Bottom
Address Bus
17b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 70C
Package Type
PLCC
Program/erase Volt (typ)
3 to 3.6V
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
128K
Supply Current
25mA
Mounting
Surface Mount
Pin Count
32
Lead Free Status / Rohs Status
Not Compliant
may be accessed by hardware or software operation. The
hardware operation mode can be used by an external pro-
grammer to identify the correct programming algorithm for
the Atmel product.
For details, see Operating Modes (for hardware operation)
or Software Product Identification. The manufacturer and
device code is the same for both modes.
DATA POLLING: The AT49(H)BV/(H)LV010 features
DATA polling to indicate the end of a program cycle. Dur-
ing a program cycle an attempted read of the last byte
loaded will result in the complement of the loaded data on
I/O7. Once the program cycle has been completed, true
data is valid on all outputs and the next cycle may begin.
DATA polling may begin at any time during the program
cycle.
T O G G L E B I T : I n a d d i t i o n t o D A T A p o l l i n g t h e
AT49(H)BV/(H)LV010 provides another method for deter-
mining the end of a program or erase cycle. During a pro-
gram or erase operation, successive attempts to read data
from the device will result in I/O6 toggling between one and
zero. Once the program cycle has completed, I/O6 will stop
toggling and valid data will be read. Examining the toggle
bit may begin at any time during a program cycle.
HARDWARE DATA PROTECTION: Hardware features
p r o t e c t a g a i n s t i n a d v e r t e n t p r o g r a m s t o t h e
AT49(H)BV/(H)LV010 in the following ways: (a) V
if V
ited. (b) Program inhibit: holding any one of OE low, CE
high or WE high inhibits program cycles. (c) Noise filter:
Pulses of less than 15 ns (typical) on the WE or CE inputs
will not initiate a program cycle.
INPUT LEVELS: While operating with a 2.7V to 3.6V
power supply, the address inputs and control inputs ( OE,
CE and WE) may be driven from 0 to 5.5V without
adversely affecting the operation of the device. The I/O
lines can only be driven from 0 to V
CC
is below 1.8V (typical), the program function is inhib-
AT49(H)BV/(H)LV010
CC
+ 0.6V.
CC
sense:
3