IDTQS5LV919-133Q IDT, Integrated Device Technology Inc, IDTQS5LV919-133Q Datasheet - Page 5

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IDTQS5LV919-133Q

Manufacturer Part Number
IDTQS5LV919-133Q
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
PLL Clock Driverr
Datasheet

Specifications of IDTQS5LV919-133Q

Number Of Elements
1
Pll Input Freq (min)
2.5MHz
Pll Input Freq (max)
100MHz
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
QSOP
Output Frequency Range
5 to 133MHz
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Industrial
Pin Count
28
Lead Free Status / Rohs Status
Not Compliant

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INPUT TIMING REQUIREMENTS
NOTES:
1.
2.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
NOTES:
1. See Test Loads and Waveforms for test load and termination.
2. Skew specifications apply under identical environments (loading, temperature, V
3. Measured in open loop mode PLL_EN = 0.
4. Jitter is characterized with Q output at 20MHz. See Frequency Selection Table for information on proper FREQ_SEL level for specified input frequencies.
5. Skew measured at selected synchronization edge.
6. t
QS5LV919
3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER
Symbol
Symbol
t
t
PWC
t
R
t
D
See Output Frequency and Frequency Selection tables for more detail on allowable SYNC input frequencies for different speed grades with different FEEDBACK and
FREQ_SEL combinations.
Where pulse witdh implied by D
SKALL
PD
LOCK
t
F
t
t
t
t
t
t
t
t
, t
SKR
PZH
PHZ
R,
SKF
t
PZL
PLZ
PW
PW
H
PD
t
I
J
F
t
measured at device inputs at 0.5V
F
Description
Maximum input rise and fall times, 0.8V to 2V
Input Clock Frequency, SYNC
Input clock pulse, HIGH or LOW
Input duty cycle, SYNC
Parameter
Output Skew Between Rising Edges, Q
Output Skew Between Falling Edges, Q
Output Skew, All Outputs
Pulse Width, 2xQ output, >40MHz
Pulse Width, Q
Cycle-to-Cycle Jitter
SYNC Input to Feedback Delay
SYNC to Phase Lock
Output Enable Time, OE/RST LOW to HIGH
Output Disable Time, OE/RST HIGH to LOW
Output Rise/Fall Times, 0.8V ∼ 2V
(1)
(1)
0
-Q
H
is less than t
4
, Q
(4)
DD
5,
, Q output at 80MHz.
0
Q/2 outputs, 80MHz
, SYNC
(2, 5)
WPC
0
(6)
, SYNC
(2)
1
(2)
limit, t
0
1
0
WPC
-Q
(1)
-Q
4
4
(3)
(and Q/
limit applies
(3)
(and Q/
2
2
if PE = LOW)
if PE = HIGH)
DD
, device speed grade).
5
(2)
(2)
T
T
CY
CY
Min.
/2
/2
0.3
0.15
500
0
0
0.4
0.4
Min.
2.5
25
INDUSTRIAL TEMPERATURE RANGE
2
T
T
CY
CY
Max.
0.15
300
300
500
/2 + 0.4
/2 + 0.4
10
14
14
0
2
Max.
100
75
3
MHz
Unit
Unit
ms
%
ns
ns
ps
ps
ps
ns
ns
ns
ps
ns
ns
ns

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