A54SX08A-FTQ100 MICROSEMI, A54SX08A-FTQ100 Datasheet - Page 16

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A54SX08A-FTQ100

Manufacturer Part Number
A54SX08A-FTQ100
Description
Manufacturer
MICROSEMI
Datasheet

Specifications of A54SX08A-FTQ100

Family Name
SX-A
Number Of Usable Gates
8000
Number Of Logic Blocks/elements
768
# Registers
512
# I/os (max)
81
Frequency (max)
172MHz
Process Technology
0.25um/0.22um (CMOS)
Operating Supply Voltage (typ)
2.5V
Logic Cells
512
Device System Gates
12000
Propagation Delay Time
1.7ns
Operating Supply Voltage (min)
2.25V
Operating Supply Voltage (max)
2.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Package Type
TQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A54SX08A-FTQ100
Manufacturer:
Microsemi SoC
Quantity:
10 000
SX-A Probe Circuit Control Pins
SX-A devices contain internal probing circuitry that
provides built-in access to every node in a design,
enabling 100% real-time observation and analysis of a
device's internal logic nodes without design iteration.
The probe circuitry is accessed by Silicon Explorer II, an
easy to use, integrated verification and logic analysis tool
that can sample data at 100 MHz (asynchronous) or
66 MHz (synchronous). Silicon Explorer II attaches to a
PC’s standard COM port, turning the PC into a fully
functional 18-channel logic analyzer. Silicon Explorer II
allows designers to complete the design verification
process at their desks and reduces verification time from
several hours per cycle to a few seconds.
The Silicon Explorer II tool uses the boundary-scan ports
(TDI, TCK, TMS, and TDO) to select the desired nets for
verification. The selected internal nets are assigned to the
Figure 1-13 • Probe Setup
1 -1 2
SX-A Family FPGAs
Serial Connection
Silicon Explorer II
v5.3
PRA/PRB pins for observation.
interconnection between Silicon Explorer II and the FPGA
to perform in-circuit verification.
Design Considerations
In order to preserve device probing capabilities, users
should avoid using the TDI, TCK, TDO, PRA, and PRB pins
as input or bidirectional ports. Since these pins are active
during probing, critical input signals through these pins
are not available. In addition, the security fuse must not
be programmed to preserve probing capabilities. Actel
recommends that you use a 70 Ω series termination
resistor on every probe connector (TDI, TCK, TMS, TDO,
PRA, PRB). The 70 Ω series termination is used to prevent
data transmission corruption during probing and
reading back the checksum.
TDI
TCK
TMS
70 Ω
70 Ω
70 Ω
70 Ω
70 Ω
70 Ω
TDO
PRA
PRB
Figure 1-13
SX-A FPGA
illustrates the

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