M29W400DB55ZE1 Micron Technology Inc, M29W400DB55ZE1 Datasheet - Page 22

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M29W400DB55ZE1

Manufacturer Part Number
M29W400DB55ZE1
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of M29W400DB55ZE1

Lead Free Status / Rohs Status
Not Compliant

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Program/Erase controller has stopped the memory will be set to Read mode and the Erase
will be suspended. If the Erase Suspend command is issued during the period when the
memory is waiting for an additional block (before the Program/Erase controller starts) then
the Erase is suspended immediately and will start immediately when the Erase Resume
command is issued. It is not possible to select any further blocks to erase after the Erase
Resume.
During Erase Suspend it is possible to Read and Program cells in blocks that are not being
erased; both Read and Program operations behave as normal on these blocks. If any
attempt is made to program in a protected block or in the suspended block then the Program
command is ignored and the data remains unchanged. The Status Register is not read and
no error condition is given. Reading from blocks that are being erased will output the Status
Register.
It is also possible to issue the Auto Select and Unlock Bypass commands during an Erase
Suspend. The Read/Reset command must be issued to return the device to Read Array
mode before the Resume command will be accepted.
Erase Resume command
The Erase Resume command must be used to restart the Program/Erase controller from
Erase Suspend. An erase can be suspended and resumed more than once.
Block Protect and Chip Unprotect commands
Each block can be separately protected against accidental program or erase. The whole
chip can be unprotected to allow the data inside the blocks to be changed.
Block Protect and Chip Unprotect operations are described in
Table 4.
1. Typical values measured at room temperature and nominal voltages.
2. Sampled, but not 100% tested.
3. Maximum value measured at worst case conditions for both temperature and V
4. Maximum value measured at worst case conditions for both temperature and V
Chip Erase (all bits in the memory set to ‘0’)
Chip Erase
Block Erase (64 Kbytes)
Program (byte or word)
Chip Program (byte by byte)
Chip Program (word by word)
Erase Suspend latency time
Program/Erase cycles (per block)
Data retention
Program/Erase cycles.
Program, Erase times and Program, Erase endurance cycles
Parameter
100,000
Min
20
Typ
Appendix B: Block
2.5
0.8
5.5
2.8
10
18
6
(1)(2)
CC
CC
.
after 100,000
Max
200
1.6
12
30
15
25
(3)
(3)
(3)
(4)
(4)
(3)
(2)
protection.
cycles
years
Unit
μs
μs
s
s
s
s
s

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