AM29LV640MB90REI Spansion Inc., AM29LV640MB90REI Datasheet
AM29LV640MB90REI
Specifications of AM29LV640MB90REI
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AM29LV640MB90REI Summary of contents
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Am29LV640MT/B Data Sheet This product has been retired and is not available for designs. For new and current designs, S29GL064A supersedes Am29LV640MT/B and is the factory-recommended migration path. Please refer to the S29GL064A datasheet for specifications and ordering information. Availability ...
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... Data# polling & toggle bits provide status — Unlock Bypass Program command reduces overall multiple-word programming time — CFI (Common Flash Interface) compliant: allows host system to identify and accommodate multiple flash devices Hardware features — Sector Group Protection: hardware-level method of preventing write operations within a sector group — ...
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... The RESET# pin can be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the host system to read boot-up firmware from the Flash memory device. The device reduces power consumption in the standby mode when it detects specific voltage levels on CE# and RESET#, or when addresses have been stable for a specified period of time ...
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... To download related documents, click on the following → links www.amd.com Flash Memory → → uct Information MirrorBit Flash Information nical Documentation. MirrorBit™ Flash Memory Write Buffer Programming and Page Buffer Read February 1, 2007 26190C8 Packages V IO 48-pin TSOP (std. & rev. pinout), Yes 63-ball FBGA ...
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... Hardware Data Protection ...................................................... 24 Low VCC Write Inhibit ............................................................ 24 Write Pulse “Glitch” Protection ............................................... 24 Logical Inhibit .......................................................................... 24 Power-Up Write Inhibit ............................................................ 24 Common Flash Memory Interface (CFI Table 8. CFI Query Identification String .............................. 25 Table 9. System Interface String......................................................25 Table 10. Device Geometry Definition................................. 26 Table 11. Primary Vendor-Specific Extended Query........... 27 Command Definitions . . . . . . . . . . . . . . . . . . . . . 27 Reading Array Data ...
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Revision Summary February 1, 2007 26190C8 Am29LV640MT/B ...
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PRODUCT SELECTOR GUIDE Part Number V = 3.0–3.6 V Speed CC Option V = 2.7–3 Max. Access Time (ns) Max. CE# Access Time (ns) Max. Page access time (t ) PACC Max. OE# Access Time (ns) Note: See ...
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CONNECTION DIAGRAMS A15 1 A14 2 A13 3 A12 4 A11 5 A10 A19 9 A20 10 WE# 11 RESET# 12 A21 13 WP#/ACC 14 RY/BY# 15 A18 16 A17 ...
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... A13 A12 WE# RESET RY/BY# WP#/ACC A17 Special Package Handling Instructions Special handling is required for Flash Memory products in molded packages (TSOP and BGA). The package 64-Ball Fortified BGA ( BGA) Top View, Balls Facing Down A14 A15 A16 BYTE# DQ15/A A10 A11 DQ7 ...
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PIN DESCRIPTION A21– Address inputs DQ14–DQ0 = 15 Data inputs/outputs DQ15/A-1 = DQ15 (Data input/output, word mode), A-1 (LSB Address input, byte mode) CE# = Chip Enable input OE# = Output Enable input WE# = Write Enable input ...
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... AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following: Am29LV640M T 120R PC DEVICE NUMBER/DESCRIPTION Am29LV640M 64 Megabit ( 16-Bit 8-Bit) MirrorBit™ Boot Sector Flash Memory 3.0 Volt-only Read, Program, and Erase Valid Combinations for Speed V CC TSOP Package (ns) Range 3.0– ...
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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory loca- tion. The register is a latch ...
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The internal state machine is set for reading array data upon device power-up, or after a hardware reset. This ensures that no spurious alteration of the memory content occurs during the power transition. No com- mand is necessary in this ...
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... greater. ACC The RESET# pin can be tied to the system reset cir- cuitry. A system reset would thus also reset the Flash memory, enabling the system to read the boot-up firm- ware from the Flash memory. Refer to the AC Characteristics rameters and to ...
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Table 2. Am29LV640MT Top Boot Sector Architecture (Continued) Sector Address Sector A21–A12 SA27 0011011xxx SA28 0011000xxx SA29 0011101xxx SA30 0011110xxx SA31 0011111xxx SA32 0100000xxx SA33 0100001xxx SA34 0100010xxx SA35 0101011xxx SA36 0100100xxx SA37 0100101xxx SA38 0100110xxx SA39 0100111xxx SA40 0101000xxx ...
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Table 2. Am29LV640MT Top Boot Sector Architecture (Continued) Sector Address Sector A21–A12 SA82 1010010xxx SA83 1010011xxx SA84 1010100xxx SA85 1010101xxx SA86 1010110xxx SA87 1010111xxx SA88 1011000xxx SA89 1011001xxx SA90 1011010xxx SA91 1011011xxx SA92 1011100xxx SA93 1011101xxx SA94 1011110xxx SA95 1011111xxx ...
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Table 3. Am29LV640MB Bottom Boot Sector Architecture Sector Address Sector A21–A12 SA0 0000000000 SA1 0000000001 SA2 0000000010 SA3 0000000011 SA4 0000000100 SA5 0000000101 SA6 0000000110 SA7 0000000111 SA8 0000001xxx SA9 0000010xxx SA10 0000011xxx SA11 0000100xxx SA12 0000101xxx SA13 0000110xxx SA14 ...
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Table 3. Am29LV640MB Bottom Boot Sector Architecture (Continued) Sector Address Sector A21–A12 SA54 0101111xxx SA55 0110000xxx SA56 0110001xxx SA57 0110010xxx SA58 0110011xxx SA59 0100100xxx SA60 0110101xxx SA61 0110110xxx SA62 0110111xxx SA63 0111000xxx SA64 0111001xxx SA65 0111010xxx SA66 0111011xxx SA67 0111100xxx ...
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Table 3. Am29LV640MB Bottom Boot Sector Architecture (Continued) Sector Address Sector A21–A12 SA109 1100110xxx SA110 1100111xxx SA111 1101000xxx SA112 1101001xxx SA113 1101010xxx SA114 1101011xxx SA115 1101100xxx SA116 1101101xxx SA117 1101110xxx SA118 1101111xxx SA119 1110000xxx SA120 1110001xxx SA121 1110010xxx SA122 1110011xxx ...
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Autoselect Mode The autoselect mode provides manufacturer and de- vice identification, and sector protection verification, through identifier codes output on DQ7–DQ0. This mode is primarily intended for programming equip- ment to automatically match a device programmed with its corresponding programming ...
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... The device is shipped with all sector groups unpro- tected. AMD offers the option of programming and pro- tecting sector groups at its factory prior to shipping the device through AMD’s ExpressFlash™ Service. Con- tact an AMD representative for details possible to determine whether a sector group is protected or unprotected ...
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Table 6. Am29LV640MB Bottom Boot Sector Protection (Continued) Sector A21–A12 SA55–SA58 01100XXXXX SA59–SA62 01101XXXXX SA63–SA66 01110XXXXX SA67–SA70 01111XXXXX SA71–SA74 10000XXXXX SA75–SA78 10001XXXXX SA79–SA82 10010XXXXX SA83–SA86 10011XXXXX SA87–SA90 10100XXXXX SA91–SA94 10101XXXXX SA95–SA98 10110XXXXX SA99–SA102 10111XXXXX SA103–SA106 11000XXXXX SA107–SA110 11001XXXXX SA111–SA114 11010XXXXX ...
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START PLSCNT = 1 RESET Wait 1 μs Temporary Sector No First Write Group Unprotect Cycle = 60h? Mode Yes Set up sector group address Sector Group Protect: Write 60h to sector group address with A6–A0 = ...
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... See Table 7 ing. Customers can opt to have their code programmed by AMD through the AMD ExpressFlash service. The de- vices are then shipped from AMD’s factory with the Secured Silicon Sector permanently locked. Contact an AMD representative for details on using AMD’s Ex- pressFlash service ...
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... Tables for command definitions). In addition, the following COMMON FLASH MEMORY INTERFACE (CFI) The Common Flash Interface (CFI) specification out- lines device and host system software interrogation handshake, which allows specific vendor-specified software algorithms to be used for entire families of devices ...
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Addresses Addresses (x16) (x8) Data 10h 20h 0051h 11h 22h 0052h 12h 24h 0059h 13h 26h 0002h 14h 28h 0000h 15h 2Ah 0040h 16h 2Ch 0000h 17h 2Eh 0000h 18h 30h 0000h 19h 32h 0000h 1Ah 34h 0000h Addresses Addresses ...
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... Table 10. Device Geometry Definition Description N Device Size = 2 byte Flash Device Interface description (refer to CFI publication 100) Max. number of byte in multi-byte write = 2 (00h = not supported) Number of Erase Block Regions within device (01h = uniform device, 02h = boot device) Erase Block Region 1 Information (refer to the CFI specification or CFI publication 100) ...
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Table 11. Primary Vendor-Specific Extended Query Addresses Addresses (x16) (x8) Data 40h 80h 0050h 41h 82h 0052h 42h 84h 0049h 43h 86h 0031h 44h 88h 0033h 45h 8Ah 0008h 46h 8Ch 0002h 47h 8Eh 0001h 48h 90h 0001h 49h 92h ...
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... Silicon Sector region until the system issues the four-cycle Exit Secured Silicon Sector command se- quence. The Exit Secured Silicon Sector command sequence returns the device to normal operation. Ta- bles 12 and ments for both command sequences. See also Silicon Sector Flash Memory Region mation. Am29LV640MT/B A7:A0 A6:A-1 (x16) (x8) 00h ...
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... Once the specified number of write buffer locations have been loaded, the system must then write the Pro- gram Buffer to Flash command at the sector address. Any other address and data combination aborts the Write Buffer Programming operation. The device then begins programming ...
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DQ7, DQ6, DQ5, and DQ1 should be monitored to determine the device status during Write Buffer Programming. The write-buffer programming operation can be sus- pended using the standard program suspend/resume commands. Upon successful completion of the Write ...
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... Sector Address Write first address/data Yes Abort Write to Buffer Operation? (Note 1) Write next address/data pair Write program buffer to flash sector address Read DQ7 - DQ0 at Last Loaded Address DQ7 = Data DQ1 = 1? DQ5 = 1? Yes Read DQ7 - DQ0 with address = Last Loaded ...
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Write Program Command Sequence Data Poll from System Embedded Program algorithm in progress Verify Data? No Increment Address Last Address? Programming Completed Note: See Table 13 for program command sequence. Figure 5. Program Operation ...
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The system must write the Program Resume com- mand (address bits are don’t care) to exit the Program Suspend mode and continue the programming opera- tion. Further writes of the Resume command are ig- nored. Another Program Suspend command can ...
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The system can monitor DQ3 to determine if the sec- tor erase timer has timed out. See Timer on page 41. The time-out begins from the rising ...
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... When an erase operation is suspended, any of the internal operations that were not fully com- pleted must be restarted. As such, if this flash device is continually issued suspend/resume commands in rapid succession, erase progress is impeded as a function of the number of suspends. The result is a longer cumulative erase time than without suspends ...
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... The total number of cycles in the command sequence is determined by the number of words written to the write buffer. The maximum number of cycles in the command sequence is 21, including "Program Buffer to Flash" command. 12. Command sequence resets device for next command after aborted write-to-buffer operation. 13. The Unlock Bypass command is required prior to the Unlock Bypass Program command ...
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... The total number of cycles in the command sequence is determined by the number of bytes written to the write buffer. The maximum number of cycles in the command sequence is 37, including "Program Buffer to Flash" command. 12. Command sequence resets device for next command after aborted write-to-buffer operation. 13. The Unlock Bypass command is required prior to the Unlock Bypass Program command ...
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WRITE OPERATION STATUS The device provides several bits to determine the status of a program or erase operation: DQ2, DQ3, DQ5, DQ6, and DQ7. Table 14 and the following subsections describe the function of these bits. DQ7 and DQ6 each ...
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RY/BY#: Ready/Busy# The RY/BY dedicated, open-drain output pin which indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since ...
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START Read DQ7–DQ0 Read DQ7–DQ0 No Toggle Bit = Toggle? Yes No DQ5 = 1? Yes Read DQ7–DQ0 Twice Toggle Bit No = Toggle? Yes Program/Erase Operation Not Program/Erase Complete, Write Operation Complete Reset Command Note: The system should recheck ...
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In this case, the system must start at the beginning of the algorithm when it returns to de- termine the status of the operation (top of DQ5: Exceeded Timing Limits DQ5 indicates whether the program, erase, or ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . –65°C to +150°C Ambient Temperature with Power Applied ...
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DC CHARACTERISTICS CMOS Compatible Parameter Parameter Description Symbol (Notes) I Input Load Current ( A9, ACC Input Load Current LIT I Output Leakage Current LO I Reset Leakage Current LR V Active Read Current CC I CC1 (2, ...
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TEST CONDITIONS Device Under Test C 6.2 kΩ L Note: Diodes are IN3064 or equivalent Figure 12. Test Setup KEY TO SWITCHING WAVEFORMS WAVEFORM Don’t Care, Any Change Permitted 3.0 V 1.5 V Input 0.0 V Note < ...
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AC CHARACTERISTICS Read-Only Operations Parameter JEDEC Std. Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV CE t Page Access Time PACC t ...
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AC CHARACTERISTICS A21-A2 A1-A0 Data Bus CE# OE# * Figure shows word mode. Addresses are A1–A-1 for byte mode Same Page PACC PACC t ACC Qa ...
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AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std. RESET# Pin Low (During Embedded Algorithms) t Ready to Read Mode (See Note) RESET# Pin Low (NOT During Embedded t Ready Algorithms) to Read Mode t RESET# Pulse Width RP t Reset ...
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AC CHARACTERISTICS Erase and Program Operations Parameter JEDEC Std. Description t t Write Cycle Time AVAV Address Setup Time AVWL AS Address Setup Time to OE# low during toggle bit t ASO polling t t Address Hold ...
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AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE# OE# WE Data RY/BY VCS Notes program address program data Illustration shows device in word ...
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AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE Data 55h RY/BY# t VCS V CC Notes sector address (for Sector Erase Valid ...
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AC CHARACTERISTICS Addresses t POLL CE OE# t OEH WE# DQ15 and DQ7 DQ14–DQ8, DQ6–DQ0 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array data ...
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AC CHARACTERISTICS Addresses CE# t OEH WE# OE Valid Data DQ6/DQ2 (first read) RY/BY# Note Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status read cycle, and array ...
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AC CHARACTERISTICS Temporary Sector Unprotect Parameter JEDEC Std Description t V Rise and Fall Time VIDR ID RESET# Setup Time for Temporary Sector t RSP Unprotect Note: Not 100% tested RESET ...
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AC CHARACTERISTICS RESET# SA, A6, A1, A0 Sector Group Protect or Unprotect Data 60h 1 µs CE# WE# OE# * For sector group protect, A6–A0 = 0xx0010. For sector group unprotect, A6–A0 = 1xx0010. Figure 24. ...
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AC CHARACTERISTICS Alternate CE# Controlled Erase and Program Operations Parameter JEDEC Std. Description t t Write Cycle Time AVAV Address Setup Time AVWL Address Hold Time ELAX Data Setup Time DVEH ...
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AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes: 1. Figure indicates last two bus cycles of a program or erase operation ...
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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Single Word/Byte Program Time (Note 3) Accelerated Single Word/Byte Program Time (Note 3) Total Write Buffer Program Time (Note 4) Effective Write Buffer Program Time (Note 5) Total Accelerated ...
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TSOP PIN AND BGA PACKAGE CAPACITANCE Parameter Symbol Parameter Description C Input Capacitance IN C Output Capacitance OUT C Control Pin Capacitance IN2 Notes: 1. Sampled, not 100% tested. 2. Test conditions T = 25° 1.0 MHz. A ...
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PHYSICAL DIMENSIONS TS 048—48-Pin Standard Pinout Thin Small Outline Package (TSOP) February 1, 2007 26190C8 Am29LV640MT/B Dwg rev AA; 10/99 59 ...
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PHYSICAL DIMENSIONS FBE063—63-Ball Fine-pitch Ball Grid Array ( BGA Package Am29LV640MT/B Dwg rev AF; 10/99 26190C8 February 1, 2007 ...
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PHYSICAL DIMENSIONS LAA064—64-Ball Fortified Ball Grid Array ( February 1, 2007 26190C8 BGA Package Am29LV640MT/B 61 ...
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... Changed from 56-Pin Standard TSOP to 48-Pin Stan- dard TSOP. Product Selector Guide Added regulated OPNs. Revision C (December 5, 2002) Secured Silicon Sector Flash Memory Region, and Enter Secured Silicon Sector/Exit Secured Silicon Sector Command Sequence Noted that the A are not available when the Secured Silicon sector is en- abled ...
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Word/Byte Configuration Changed BYTE# Switching Low to Output High Z Speed Options from ns. Customer Lockable: Secured Silicon Sector NOT Programmed or Protected at the factory. Added second bullet, Secured Silicon sector-protect. Revision C+1 (February 16, ...
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... Please note that Spansion Inc. will not be liable to you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure ...