LH28F160BJHE-BTLTH Sharp Electronics, LH28F160BJHE-BTLTH Datasheet - Page 19

• Manufacturer Part Number: LH28F160BJHE-BTLTH
• Manufacturer: Sharp Electronics

Specifications of LH28F160BJHE-BTLTH

• Cell Type: NOR
• Density: 16Mb
• Access Time (max): 90ns
• Interface Type: Parallel
• Boot Type: Bottom
• Address Bus: 21/20Bit
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -25C to 85C
• Package Type: TSOP
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 2M/1M
• Supply Current: 30mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Compliant

4.12 Block Locking by the WP#
This Boot Block Flash memory architecture features two
hardware-lockable boot blocks so that the kernel code for
the system can be kept secure while other blocks are
programmed or erased as necessary.
The lockable two boot blocks are locked when WP#=V
any program or erase operation to a locked block will
Block Erase ≤V
Clear Block ≤V
Word/Byte
Permanent
Operation
Lock-Bits
Set Block
Full Chip
Lock-Bit
Lock-Bit
Write
Erase
Set
or
>V
≤V
>V
≤V
>V
>V
≤V
>V
V
CCWLK
CCWLK
CCWLK
CCWLK
CCWLK
CCWLK
CCWLK
CCWLK
CCWLK
CCWLK
CCW
RP#
V
V
V
V
V
V
V
V
V
V
X
X
X
X
X
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
Permanent
Lock-Bit
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
0
1
Table 5. Write Protection Alternatives
Lock-bit
Block
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
IL
;
WP#
V
V
V
V
V
V
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
IL
IH
IL
IH
IL
IH
All Blocks Locked.
All Blocks Locked.
2 Boot Blocks Locked.
Block Erase and Word/Byte Write Enabled.
Block Erase and Word/Byte Write Disabled.
Block Erase and Word/Byte Write Disabled.
All Blocks Locked.
All Blocks Locked.
All Unlocked Blocks are Erased.
2 Boot Blocks and Locked Blocks are NOT Erased.
All Unlocked Blocks are Erased,
Locked Blocks are NOT Erased.
Set Block Lock-Bit Disabled.
Set Block Lock-Bit Disabled.
Set Block Lock-Bit Enabled.
Set Block Lock-Bit Disabled.
Clear Block Lock-Bits Disabled.
Clear Block Lock-Bits Disabled.
Clear Block Lock-Bits Enabled.
Clear Block Lock-Bits Disabled.
Set Permanent Lock-Bit Disabled.
Set Permanent Lock-Bit Disabled.
Set Permanent Lock-Bit Enabled.
result in an error, which will be reflected in the status
register. For top configuration, the top two boot blocks are
lockable. For the bottom configuration, the bottom two
boot blocks are lockable. If WP# is V
bit is not set, boot block can be programmed or erased
normally (Unless V
only two boot blocks, other blocks are not affected.
CCW
Effect
is below V
CCWLK
IH
and block lock-
). WP# is valid
Rev. 1.26