LH28F160BJHE-BTLZD Sharp Electronics, LH28F160BJHE-BTLZD Datasheet - Page 39

LH28F160BJHE-BTLZD

Manufacturer Part Number
LH28F160BJHE-BTLZD
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LH28F160BJHE-BTLZD

Cell Type
NOR
Density
16Mb
Access Time (max)
100ns
Interface Type
Parallel
Boot Type
Bottom
Address Bus
20b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
16b
Number Of Words
1M
Supply Current
30mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant
6.2.7 RESET OPERATIONS
NOTES:
1. If RP# is asserted while a block erase, full chip erase, word write or lock-bit configuration operation is not executing, the
2. A reset time, t
3. When the device power-up, holding RP# low minimum 100ns is required after V
t
t
t
PLPH
PLR1
2VPH
Sym.
reset will complete within 100ns.
Characteristics - Read-Only Operations for t
has been in stable there.
RP# Pulse Low Time
RP# Low to Reset during Block Erase, Full Chip Erase, Word
Write or Lock-Bit Configuration
V
CC
2.7V to RP# High
PHQV
SR.7(R)
SR.7(R)
RP#(P)
RP#(P)
RP#(P)
V
CC
, is required from the later of SR.7 going "1" or RP# going high until outputs are valid. Refer to AC
2.7V
V
V
V
V
V
V
V
"1"
"0"
"1"
"0"
IH
IH
IH
IL
IL
IL
IL
(B)Reset During Block Erase, Full Chip Erase, Word Write or Lock-Bit Configuration
Parameter
Figure 17. AC Waveform for Reset Operation
t
t
PLPH
PLPH
PHQV
Reset AC Specifications
.
(A)Reset During Read Array Mode
t
2VPH
t
PLR1
(C)RP# rising Timing
Notes
1,2
2,3
2
CC
has been in predefined range and also
Min.
100
100
Max.
30
Rev. 1.27
Unit
ns
µs
ns

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