LH28F160BJHE-BTLZD Sharp Electronics, LH28F160BJHE-BTLZD Datasheet - Page 5

• Manufacturer Part Number: LH28F160BJHE-BTLZD
• Manufacturer: Sharp Electronics

Specifications of LH28F160BJHE-BTLZD

• Cell Type: NOR
• Density: 16Mb
• Access Time (max): 100ns
• Interface Type: Parallel
• Boot Type: Bottom
• Address Bus: 20b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 16b
• Number Of Words: 1M
• Supply Current: 30mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

1 INTRODUCTION
This
specifications. Section 1 provides a flash memory
overview. Sections 2, 3, 4 and 5 describe the memory
organization and functionality. Section 6 covers electrical
specifications.
1.1 Features
Key enhancements of LH28F160BJHE-BTLZD boot
block Flash memory are:
Please note following:
1.2 Product Overview
The LH28F160BJHE-BTLZD is a high-performance 16M-
bit Boot Block Flash memory organized as 1M-word of 16
bits. The 1M-word of data is arranged in two 4K-word
boot blocks, six 4K-word parameter blocks and thirty-one
32K-word main blocks which are individually erasable,
lockable and unlockable in-system. The memory map is
shown in Figure 3.
The dedicated V
when V
Single low voltage operation
Low power consumption
Enhanced Suspend Capabilities
Boot Block Architecture
V
3.6V block erase, full chip erase, word write and lock-
bit configuration operations. The V
transitions to GND is recommended for designs that
switch V
CCWLK
CCW
datasheet
CCW
has been lowered to 1.0V to support 2.7V-
V
CCWLK
CCW
off during read operation.
contains
.
pin gives complete data protection
LH28F160BJHE-BTLZD
CCW
voltage
A Command User Interface (CUI) serves as the interface
between the system processor and internal operation of the
device. A valid command sequence written to the CUI
initiates device automation. An internal Write State
Machine (WSM) automatically executes the algorithms
and timings necessary for block erase, full chip erase,
word write and lock-bit configuration operations.
A block erase operation erases one of the device’s 32K-
word blocks typically within 1.2s (3V V
4K-word blocks typically within 0.6s (3V V
independent of other blocks. Each block can be
independently erased minimum 100,000 times. Block
erase suspend mode allows system software to suspend
block erase to read or write data from any other block.
Writing memory data is performed in word increments of
the device’s 32K-word blocks typically within 33µs (3V
V
(3V V
the system to read data or execute code from any other
flash memory array location.
Individual block locking uses a combination of bits, thirty-
nine block lock-bits, a permanent lock-bit and WP# pin, to
lock and unlock blocks. Block lock-bits gate block erase,
full chip erase and word write operations, while the
permanent lock-bit gates block lock-bit modification and
locked
operations (Set Block Lock-Bit, Set Permanent Lock-Bit
and Clear Block Lock-Bits commands) set and cleared
lock-bits.
The status register indicates when the WSM’s block erase,
full chip erase, word write or lock-bit configuration
operation is finished.
CC
, 3V V
CC
, 3V V
block
CCW
CCW
), 4K-word blocks typically within 36µs
alternation.
). Word write suspend mode enables
Lock-bit
CC
CC
, 3V V
configuration
, 3V V
Rev. 1.27
CCW
CCW
),
)