LH28F016SUT-10 Sharp Electronics, LH28F016SUT-10 Datasheet - Page 8

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LH28F016SUT-10

Manufacturer Part Number
LH28F016SUT-10
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LH28F016SUT-10

Cell Type
NOR
Density
16Mb
Access Time (max)
100ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
21/20Bit
Operating Supply Voltage (typ)
3.3/5V
Operating Temp Range
0C to 70C
Package Type
TSOP-I
Program/erase Volt (typ)
4.5 to 5.5V
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
3/4.5V
Operating Supply Voltage (max)
3.6/5.5V
Word Size
8/16Bit
Number Of Words
2M/1M
Supply Current
60mA
Mounting
Surface Mount
Pin Count
56
Lead Free Status / Rohs Status
Not Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
LH28F016SUT-10
Manufacturer:
INTEL
Quantity:
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Part Number:
LH28F016SUT-10
Manufacturer:
AUTONICS
Quantity:
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LH28F016SU
BUS OPERATIONS, COMMANDS AND STATUS REGISTER DEFINITIONS
Bus Operations for Word-Wide Mode (BY
Bus Operations For Byte-Wide Mode (BY
NOTES:
1. X can be V
2. RY
3. RP
4. A
5. Commands for different Erase operations, Data Write operations of Lock-Block operations can only be successfully
6. While the WSM is running, RY
7. RY
8
Read
Output Disable
Standby
Deep Power-Down
Manufacturer ID
Device ID
Write
Read
Output Disable
Standby
Deep Power-Down
Manufacturer ID
Device ID
Write
RY
operation is in progress.
codes in x8 and x16 modes respectively. All other addresses are set to zero.
completed when V
V
write operations.
0
OH
    »
    »
    »
    »
and A
/ BY
/ BY
/ BY
at GND ± 0.2 V ensures the lowest deep power-down current.
when the WSM is not busy or in erase suspend mode.
MODE
MODE
    »
    »
    »
will be at V
output is open drain. When the WSM is ready, Erase is suspended or the device is in deep power-down mode,
may be at V
1
at V
IH
or V
IL
provide manufacturer ID codes in x8 and x16 modes respectively. A
IL
PP
OH
for address or control pins except for RY
OL
= V
if it is tied to V
while the WSM is busy performing various operations. For example, a status register read during a
RP
RP
V
V
V
V
V
V
V
V
V
V
V
V
V
V
PPH
IH
IH
IH
IH
IH
IH
IH
IH
IH
IH
IH
IH
IL
IL
»
»
.
    »
/ BY
CE
CE
V
V
V
V
    »
V
V
V
V
V
V
V
V
V
V
V
V
in Level-Mode (default) stays at V
X
X
IH
IH
IH
IH
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
CC
»
1
»
1
through a resistor. When the RY
CE
CE
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
X
X
IL
IL
IH
IL
IH
IL
IL
IL
IL
IL
IH
IL
IH
IL
IL
IL
»
0
»
0
OE
OE
V
V
V
V
V
V
V
V
V
V
X
X
X
X
IH
IH
IH
IH
IL
IL
IL
IL
IL
IL
»
»
    »
/ BY
  »
T E
  »
T E
    »
WE
V
V
V
V
WE
V
V
V
V
, which is either V
V
V
»
X
X
»
X
X
= V
IH
IH
IH
IH
IH
IH
IH
IH
IL
= V
IL
OL
IH
IL
    »
/ BY
until all operations are complete. RY
)
)
V
V
V
V
A
A
X
X
X
X
X
X
X
X
X
X
    »
IH
IH
IL
IL
at V
1
0
OH
OL
DQ
DQ
is independent of OE
0
or V
00B0H
and A
High-Z
High-Z
High-Z
6688H
High-Z
High-Z
High-Z
D
D
0
B0H
0
88H
D
D
16M (1M × 16, 2M × 8) Flash Memory
OUT
OUT
- DQ
OH
- DQ
IN
IN
.
1
, at V
15
7
IH
provide device ID
RY
RY
V
V
V
V
V
V
    »
X
X
X
X
X
X
X
X
OH
OH
OH
OH
OH
OH
»
/ BY
»
/ BY
while a WSM
    »
/ BY
»
»
    »
goes to
1, 2, 7
1, 6, 7
1, 6, 7
1, 5, 6
1, 2, 7
1, 6, 7
1, 6, 7
1, 5, 6
NOTE
NOTE
1, 3
1, 3
4
4
4
4

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