LH28F016LLT-12 Sharp Electronics, LH28F016LLT-12 Datasheet - Page 5

• Manufacturer Part Number: LH28F016LLT-12
• Manufacturer: Sharp Electronics

Specifications of LH28F016LLT-12

• Cell Type: NOR
• Density: 16Mb
• Access Time (max): 120ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 21/20Bit
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: TSOP-I
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 2M/1M
• Supply Current: 35mA
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / Rohs Status: Not Compliant

16M (1M × 16, 2M × 8) Flash Memory
INTRODUCTION
lutionary architecture which enables the design of truly
mobile, high performance, personal computing and com-
munication products. With innovative capabilities,
3 V single voltage operation and very high read/write
performance, the LH28F0166LL is also the ideal choice
for designing embedded mass storage flash memory
systems.
formance non-volatile read/write solution for solid-state
storage applications. Its symmetrically blocked archi-
tecture (100% compatible with the LH28F016SU 16M
Flash memory), extended cycling, minimum power
2.7 V operation, very fast write and read performance
and selective block locking provide a highly flexible
memory component suitable for battery operation por-
table equipment such as digital still camera, PDA, cel-
lular phone, and memory card. Its x8/x16 architecture
allows the optimization of memory to processor inter-
face. The flexible block locking option enables bundling
of executable of executable application software in a
Resident Flash Array or memory card. Manufactured
on Sharp’s 0.6 µm ETOX™ process technology, the
LH28F016LL is the most cost-effective, high-density
3 V single power operation flash memory.
DESCRIPTION
(16,777,216 bit) block erasable non-volatile random
access memory organized as either 1M × 16 or 2M x 8.
The LH28F016LL includes thirty-two 64K (65,536)
blocks or thirty-two 32-KW (32,768) blocks. A chip
memory map is shown in Figure 3.
enhanced features, will improve the device operating
characteristics and results in greater product reliability
and ease of use.
LH28F016LL:
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1.2 mm thick × 14 mm × 20 mm TSOP (Type I) pack-
age. This form factor and pinout allow for very high board
layout densities.
tem interface between the microprocessor or
microcontroller and the internal memory operation.
Sharp’s LH28F016LL 16M Flash Memory is a revo-
The LH28F016LL is very high density, highest per-
The LH28F016LL is a high performance 16M
The implementation of a new architecture, with many
Among the significant enhancements of the
3 V Write/Erase Operation (3 V V
3 V Low Power Capability
Improved Write Performance
Dedicated Block Write/Erase Protection
The LH28F016LL will be available in a 56-pin,
A Command User Interface (CUI) serves as the sys-
PP
)
Writes and Block Erase operations to be executed us-
ing a Two-Write command sequence to the CUI in the
same way as the LH28F008SA 8M Flash memory.
basic LH28F008SA command-set to achieve higher
write performance and provide additional capabilities.
These new commands and features include:
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word increments typically within 9 µs, a 15% improve-
ment over the LH28F008SA.
100,000 cycles. Systems can achieve 1,000,000 Block
Erase Cycles by providing wear-leveling algorithms and
graceful block retirement. These techniques have
already been employed in many flash file systems and
Hard Disk Drive designs.
256 Bytes (128 Words) each to allow page data writes.
This feature can improve a system write performance
by up to 4.8 times over previous flash memory devices.
commands to the device. Three Status Registers (de-
scribed in detail later) and a RY
information on the progress of the requested operation.
plete before the next operation can be requested, the
LH28F016LL allows queuing of the next operation while
the memory executes the current operation. This elimi-
nates system overhead when writing several bytes in a
row to the array or erasing several blocks at the same
time. The LH28F016LL can also perform write opera-
tions to one block of memory while performing erase of
another block.
locking to protect code or data such as Device Drivers,
PCMCIA card information, ROM-Executable O/S or
Application Code. Each block has an associated non-
volatile lock-bit which determines the lock status of the
block. In addition, the LH28F016LL has a master Write
Protect pin (WP
memory blocks whose lock-bits are set.
Internal Algorithm Automation allows Byte/Word
A Superset of commands have been added to the
Page Buffer Writes to Flash
Command Queuing Capability
Automatic Data Writes During Erase
Software Locking of Memory Blocks
Two-Byte Successive Writes in 8-bit Systems
Writing of memory data is performed in either byte or
Each block can be written and erased a minimum of
The LH28F016LL incorporates two Page Buffers of
All operations are started by a sequence of Write
While the LH28F008SA requires an operation to com-
The LH28F016LL provides user-selectable block
Erase All Unlocked Blocks
»
) which prevents any modifications to
»
/ BY
»
output pin provide
LH28F016LL
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