LH28F016LLT-12 Sharp Electronics, LH28F016LLT-12 Datasheet - Page 8

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LH28F016LLT-12

Manufacturer Part Number
LH28F016LLT-12
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LH28F016LLT-12

Cell Type
NOR
Density
16Mb
Access Time (max)
120ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
21/20Bit
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 70C
Package Type
TSOP-I
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
2M/1M
Supply Current
35mA
Mounting
Surface Mount
Pin Count
56
Lead Free Status / Rohs Status
Not Compliant
LH28F016LL
BUS OPERATIONS, COMMANDS AND STATUS REGISTER DEFINITIONS
Bus Operations for Word-Wide Mode (BY
Bus Operations For Byte-Wide Mode (BY
NOTES:
1. X can be V
2. RY
3. RP
4. A
5. Commands for different Erase operations, Data Write operations of Lock-Block operations can only be successfully
6. While the WSM is running, RY
8
Read
Output Disable
Standby
Deep Power-Down
Manufacturer ID
Device ID
Write
Read
Output Disable
Standby
Deep Power-Down
Manufacturer ID
Device ID
Write
RY
operation is in progress.
A
completed when V
V
0
0
OH
    »
    »
    »
and A
and A
/ BY
/ BY
at GND ± 0.2 V ensures the lowest deep power-down current.
when the WSM is not busy or in erase suspend mode.
MODE
MODE
    »
    »
will be at V
output is open drain. When the WSM is ready, Erase is suspended or the device is in deep power-down mode,
1
1
, at V
at V
IH
or V
IL
IH
provide manufacturer ID codes in x8 and x16 modes respectively. All other addresses are set to zero.
IL
provide device ID codes in x8 and x16 modes respectively. All other addresses are set to zero.
PP
OH
for address or control pins except for RY
= V
if it is tied to V
RP
RP
V
V
V
V
V
V
V
V
V
V
V
V
V
V
PPH
IH
IH
IH
IH
IH
IH
IH
IH
IH
IH
IH
IH
IL
IL
»
»
.
    »
/ BY
CE
CE
V
V
V
V
    »
V
V
V
V
V
V
V
V
V
V
V
V
in Level-Mode (default) stays at V
X
X
IH
IH
IH
IH
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
CC
»
1
»
1
through a resistor. When the RY
CE
CE
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
X
X
IL
IL
IH
IL
IH
IL
IL
IL
IL
IL
IH
IL
IH
IL
IL
IL
»
0
»
0
OE
OE
V
V
V
V
V
V
V
V
V
V
X
X
X
X
IH
IH
IH
IH
IL
IL
IL
IL
IL
IL
»
»
    »
/ BY
    »
T E
    »
T E
    »
WE
V
V
V
V
WE
V
V
V
V
, which is either V
V
V
  »
  »
X
X
X
X
= V
IH
IH
IH
IH
IH
IH
IH
IH
IL
IL
= V
OL
IH
IL
    »
/ BY
until all operations are complete. RY
)
)
V
V
V
V
A
A
X
X
X
X
X
X
X
X
X
X
    »
IH
IH
IL
IL
at V
1
0
OH
OL
DQ
DQ
is independent of OE
or V
00B0H
High-Z
High-Z
High-Z
6688H
High-Z
High-Z
High-Z
D
D
0
B0H
0
88H
D
D
16M (1M × 16, 2M × 8) Flash Memory
OUT
OUT
- DQ
OH
- DQ
IN
IN
.
15
7
RY
RY
V
V
V
V
V
V
    »
X
X
X
X
X
X
X
X
OH
OH
OH
OH
OH
OH
»
/ BY
»
/ BY
while a WSM
    »
/ BY
»
»
    »
goes to
1, 5, 6
1, 5, 6
NOTE
NOTE
1, 2
1, 6
1, 6
1, 3
1, 2
1, 6
1, 6
1, 3
4
4
4
4

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