LH28F640SPHT-PTLZ8 Sharp Electronics, LH28F640SPHT-PTLZ8 Datasheet
LH28F640SPHT-PTLZ8
Specifications of LH28F640SPHT-PTLZ8
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LH28F640SPHT-PTLZ8 Summary of contents
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... RELIMINARY RODUCT PECIFICATION LH28F640SPHT-PTLZ8 Flash Memory 64Mbit (4Mbitx16) (Model Number: LHF64PZ8) Spec. Issue Date: July 21, 2004 Spec No: EL167117 Integrated Circuits Group ...
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Handle this document carefully for it contains material protected by international copyright law. Any reproduction, full or in part, of this material is prohibited without the express written permission of the company. • When using the products covered herein, ...
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TSOP (Normal Bend) Pinout ....................... 3 Pin Descriptions.......................................................... 4 CE0, CE1, CE2 Truth Table ....................................... 5 Memory Map .............................................................. 6 Identifier Codes Address ............................................ 7 OTP Block Address Map............................................ 8 Bus Operation............................................................. 9 Command Definitions .............................................. 10 Functions of ...
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... OTP (One Time Program) block provides an area to store security code and to protect its code. * ETOX is a trademark of Intel Corporation. LHF64PZ8 LH28F640SPHT-PTLZ8 Enhanced Data Protection Features • Individual Block Lock • Absolute Protection with V • Block Erase, (Page Buffer) Program Lockout during ...
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... PEN OTP program cannot be executed and should not be attempted. DEVICE POWER SUPPLY (2.7V-3.6V): With V V SUPPLY flash memory are inhibited. Device operations at invalid V CC Characteristics) produce spurious results and should not be attempted. INPUT/OUTPUT POWER SUPPLY (2.7V-3.6V): Power supply for all input/output V ...
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NOTE: 1. For single-chip applications, CE and CE 1 LHF64PZ8 (1) Table Truth Table 0 1 ...
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Block 63 3F0000 3EFFFF 64-Kword/128-Kbyte Block 62 3E0000 3DFFFF 64-Kword/128-Kbyte Block 61 3D0000 3CFFFF 64-Kword/128-Kbyte Block 60 3C0000 3BFFFF 64-Kword/128-Kbyte Block 59 3B0000 3AFFFF 64-Kword/128-Kbyte Block 58 3A0000 39FFFF 64-Kword/128-Kbyte Block 57 390000 ...
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Manufacturer Code Manufacturer Code Device Code Device Code Block Lock Configuration Block is Unlocked Code Block is Locked NOTES: 1. The address A don't care "00H" is presented on DQ -DQ in word mode (BYTE#= ...
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LHF64PZ8 [ 000FFFH Customer Programmable Area 000085H 000084H Factory Programmed Area 000081H Reserved for Future Implementation 000080H (DQ - Customer Programmable Area Lock Bit (DQ Factory Programmed Area Lock Bit (DQ Figure 3. OTP ...
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Mode Notes RP# Read Array Output Disable V IH Standby V IH Reset Read Identifier Codes/OTP Read Query V 8,9 IH Write V 6,7,8 IH NOTES: 1. Refer to DC Characteristics. ...
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... Following the Read Identifier Codes/OTP command, read operations access manufacturer code, device code, block lock configuration code and the data within OTP block (Refer to Table 3). The Read Query command is available for reading CFI (Common Flash Interface) information. 5. Block erase or (page buffer) program cannot be executed when the selected block is locked. Unlocked block can be erased or programmed when RP ...
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Refer to Appendix of LH28F640SP series for details both block erase operation and (page buffer) program operation are suspended, the suspended (page buffer) program operation is resumed when writing the Block Erase and (Page Buffer) Program Resume (D0H) ...
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Table 6. Functions of Block Lock (3) DQ State Name 0 0 Unlocked 1 Locked NOTES: 1. Selected block is locked by the Set Block Lock Bit command. Following the Clear Block Lock Bits command, all the blocks are unlocked ...
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WSMS BESS BECBLS 7 6 SR.15 - SR.8 = RESERVED FOR FUTURE ENHANCEMENTS (R) SR.7 = WRITE STATE MACHINE STATUS (WSMS Ready 0 = Busy SR.6 = BLOCK ERASE SUSPEND STATUS (BESS) 1 ...
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SMS XSR.15-8 = RESERVED FOR FUTURE ENHANCEMENTS (R) XSR.7 = STATE MACHINE STATUS (SMS Page Buffer Program available 0 = Page Buffer Program not available XSR.6-0 =RESERVED FOR FUTURE ENHANCEMENTS ...
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... After power-up or device reset, STS configuration is set to "00". STS configuration 00 The output of the STS pin is the control signal to prevent accessing a flash memory while the internal WSM is busy (SR.7="0"). when the WSM is STS configuration 01 OL The output of the STS pin is the control signal to indicate that the erase operation is completed and the flash memory is available for the next operation ...
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Electrical Specifications 1.1 Absolute Maximum Ratings Operating Temperature During Read, Erase and Program ...-40°C to +85°C Storage Temperature During under Bias............................... -40°C to +85°C During non Bias................................ -65°C to +125°C Voltage On Any Pin (except ...
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Capacitance (T =+25°C, f=1MHz) A Symbol Parameter C Input Capacitance IN C Output Capacitance OUT NOTE: 1. Sampled, not 100% tested. 1.2.2 AC Input/Output Test Conditions V CCQ INPUT 0.0 AC test inputs are driven at V Input ...
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DC Characteristics Symbol Parameter I Input Load Current LI I Output Leakage Current Standby Current CCS Automatic Power Savings Current CCAS Reset Current CCD CC Average V ...
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Symbol Parameter V Block Erase, Clear Block Lock CC I CCE Bits Current I V (Page Buffer) Program or CCWS CC I Block Erase Suspend Current CCES V Input Low Voltage IL V Input High Voltage IH V Output Low ...
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AC Characteristics - Read-Only Operations Symbol t Read Cycle Time AVAV t Address to Output Delay AVQV Output Delay ELQV X t Page Address Access Time APA t OE# to Output Delay GLQV t RP# High ...
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(A) 22 Disabled ( (E) X Enabled ( OE# ( (W) WE High (D/Q) 15 ...
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(A) 22 AVQV (A) 2 Disabled ( ( Enabled ( OE# ( WE# ( ...
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(A) 22 AVQV V IH VALID A (A) 2-0 ADDRESS V IL Disabled ( ( Enabled ( ELQV V IH OE# ( WE# ...
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AC Characteristics - Write Operations Symbol t Write Cycle Time AVAV RP# High Recovery to WE# (CE PHWL PHEL (WE#) Setup to WE# (CE ELWL WLEL WE# (CE ...
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NOTE 1 NOTE VALID A (A) 22-0 ADDRESS V IL Disabled ( ( Enabled ( ELWL WLEL V IH OE# ( PHWL PHEL ...
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Reset Operations V RP High (D/Q) 15 RP# ( High (D/Q) 15 (min GND V ...
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Block Erase, (Page Buffer) Program and Block Lock Configuration Performance Symbol Page Buffer Program Time (Time to Program 16 words/ 32 bytes WHQV3 Program Time t EHQV3 Block Program Time (Using Page Buffer Program Command ...
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Related Document Information Document No. FUM03201 NOTE: 1. International customers should contact their local SHARP or distribution sales offices. LHF64PZ8 (1) Document Name LH28F640SP series Appendix 28 Rev. 0.06 ...
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A-1 RECOMMENDED OPERATING CONDITIONS A-1.1 At Device Power-Up AC timing illustrated in Figure A-1 is recommended for the supply voltages and the control signals at device power-up. If the timing in the figure is ignored, the device may not operate ...
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A-1.1.1 Rise and Fall Time Symbol t V Rise Time Input Signal Rise Time R t Input Signal Fall Time F NOTES: 1. Sampled, not 100% tested. 2. This specification is applied for not only the device ...
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A-1.2 Glitch Noises Do not input the glitch noises which are below V as shown in Figure A-2 (b). The acceptable glitch noises are illustrated in Figure A-2 (a). See the “DC CHARACTERISTICS“ described in specifications for V (Min.) or ...
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... A-2 RELATED DOCUMENT INFORMATION Document No. AP-001-SD-E Flash Memory Family Software Drivers AP-006-PT-E Data Protection Method of SHARP Flash Memory RP#, V AP-007-SW-E NOTE: 1. International customers should contact their local SHARP or distribution sales office. (1) Document Name Electric Potential Switching Circuit PP iv 030313 ...
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... Head Office: No. 360, Bashen Road, Xin Development Bldg. 22 Waigaoqiao Free Trade Zone Shanghai 200131 P.R. China Email: smc@china.global.sharp.co.jp EUROPE SHARP Microelectronics Europe Division of Sharp Electronics (Europe) GmbH Sonninstrasse 3 20097 Hamburg, Germany Phone: (49) 40-2376-2286 Fax: (49) 40-2376-2232 www.sharpsme.com SINGAPORE SHARP Electronics (Singapore) PTE., Ltd. ...