LH28F640SPHT-PTLZ8 Sharp Electronics, LH28F640SPHT-PTLZ8 Datasheet - Page 18

• Manufacturer Part Number: LH28F640SPHT-PTLZ8
• Manufacturer: Sharp Electronics

Specifications of LH28F640SPHT-PTLZ8

• Cell Type: NOR
• Density: 64Mb
• Access Time (max): 120ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 22b
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 16b
• Number Of Words: 4M
• Supply Current: 50mA
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / Rohs Status: Compliant

NOTE:
1. When the device is configured in one of the pulse modes, the STS pin pulses low with a typical pulse width of 250ns.
DQ
DQ
In STS configuration = "00", STS is V
executing internal erase or program algorithms.
STS configuration codes "01", "10" and "11" are all pulse
modes such that the STS pin pulses low then high when the
operation indicated by the configuration code is completed.
15
1
00 = level mode: RY/BY# indication. (Default)
01 = pulse mode on erase complete.
10 = pulse mode on program complete.
11 = pulse mode on erase or program complete.
-DQ
-DQ
15
R
R
7
0
2
= STS CONFIGURATION CODE (CC)
= RESERVED FOR FUTURE
ENHANCEMENTS (R)
14
R
R
6
13
R
R
5
OL
Table 9. STS Configuration Definition
when the WSM is
12
R
R
4
LHF64PZ8
After power-up or device reset, STS configuration is set to
"00".
STS configuration 00
STS configuration 01
STS configuration 10
STS configuration 11
that the erase operation is completed and the flash memory
The output of the STS pin is the control signal to prevent
accessing a flash memory while the internal WSM is busy
(SR.7="0").
The output of the STS pin is the control signal to indicate
is available for the next operation.
The output of the STS pin is the control signal to indicate
that the program operation is completed and the flash
memory is available for the next operation.
The output of the STS pin is the control signal to indicate
that the erase or program operation is completed and the
flash memory is available for the next operation.
11
R
R
3
(1)
10
R
R
2
NOTES:
CC
R
9
1
Rev. 0.06
CC
R
8
0
15