CY7C144-55AC Cypress Semiconductor Corp, CY7C144-55AC Datasheet
CY7C144-55AC
Specifications of CY7C144-55AC
Related parts for CY7C144-55AC
CY7C144-55AC Summary of contents
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... Document #: 38-06034 Rev 8/9 Dual-Port Static RAM Functional Description The CY7C144 and CY7C145 are high speed CMOS and dual-port static RAMs. Various arbitration schemes are included on the CY7C144/5 to handle situations when multiple processors access the same piece of data. Two ports are provided permitting independent, asynchronous access for reads and writes to any location in memory ...
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... Document #: 38-06034 Rev GND 5 INT BUSY GND M/S GND 9 BUSY INT Figure 3. 80-Pin TQFP (Top View CY7C145 CY7C144, CY7C145 Figure 2. 64-Pin TQFP (Top View CY7C144 INT 53 L BUSY L 52 GND 51 M/S 50 BUSY 49 R INT INT L BUSY L GND M/S BUSY R INT Page ...
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... Description is set when right port writes location 1FFE and is cleared when left port reads location L is set when left port writes location 1FFF and is cleared when right port reads location 1FFF. CY7C144, CY7C145 7C144-35 7C144-55 7C145-35 7C145- 160 ...
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... Architecture The CY7C144/5 consists array of 8K words of 8/9 bits each of dual-port RAM cells, I/O and address lines, and control signals (CE, OE, R/W). These control pins permit independent access for reads or writes to any location in memory. To handle simultaneous writes or reads to the same location, a BUSY pin is provided on each port ...
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... No port accessing semaphore address 1 0 Right port obtains semaphore port accessing semaphore 0 1 Left port obtains semaphore port accessing semaphore CY7C144, CY7C145 Operation Power Down Read Data in Semaphore I/O Lines Disabled Write to Semaphore Read Write Illegal Condition Right Port R 012 ...
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... V < 0.2V One Port Commercial > V – 0.2V Industrial V > V – 0. < 0.2V, Active IN [7] Port Outputs MAX CY7C144, CY7C145 Ambient Temperature V CC 5V 10 +70 C 40 5V 10 +85 C 7C144-15 7C144-25 7C145-15 7C145-25 Unit Min Max Min Max 2 ...
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... CC Figure 4. AC Test Loads and Waveforms R = 250 TH OUTPUT C = 30pF V TH (b) Th évenin Equivalent (Load 1) ALL INPUT PULSES 3.0V 90% 90% 10% GND CY7C144, CY7C145 7C144-35 7C144-55 7C145-35 7C145-55 Min Max Min Max 2.4 2.4 0.4 0.4 2.2 2.2 0.8 0.8 10 ...
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... For information on part-to-part delay through RAM cells from writing port to reading port, refer to Read Timing with Port-to-Port Delay waveform. Document #: 38-06034 Rev. *G 7C144-15 7C144-25 7C145-15 7C145-25 Min Max Min Max Min less than t and t is less than t HZCE LZCE HZOE CY7C144, CY7C145 7C144-35 7C144-55 7C145-35 7C145-55 Unit Max Min Max LZOE Page ...
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... SOP SEM) t SEM Flag Write to Read Time SWRD t SEM Flag Contention SPS Window Note 13. Test conditions used are Load 2. Document #: 38-06034 Rev. *G (continued) 7C144-15 7C144-25 7C145-15 7C145-25 Min Max Min CY7C144, CY7C145 7C144-35 7C144-55 7C145-35 7C145-55 Max Min Max Min Max ...
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... L, SEM = H when accessing RAM SEM = L when accessing semaphores. L 18. BUSY = HIGH for the writing port. 19 LOW Document #: 38-06034 Rev ACE t DOE LZOE DATA VALID t WC MATCH t PWE MATCH t WDD CY7C144, CY7C145 [14, 15] DATA VALID [14, 16, 17] t HZCE t HZOE t PD [18, 19 VALID t DDD VALID Page ...
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... Data I/O pins enter high impedance when OE is held LOW during write. Document #: 38-06034 Rev SCE PWE HZOE HIGH IMPEDANCE SCE PWE t HZWE PWE CY7C144, CY7C145 [20, 21, 22 DATA VALID t LZOE [20, 22, 23 DATAVALID t LZWE HIGH IMPEDANCE allow the I/O drivers to turn off and data to be HZWE SD Page ...
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... SPS Document #: 38-06034 Rev VALID ADDRESS SCE SOP t SD DATA VALID PWE t SWRD t SOP WRITE CYCLE READ CYCLE Figure 11. Semaphore Contention MATCH t SPS MATCH = CE = HIGH R L CY7C144, CY7C145 [24 OHA t ACE DATA VALID OUT t DOE [25, 26, 27] Page ...
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... Switching Waveforms (continued) ADDRESS R R/W R DATAIN ADDRESS L BUSY L DATA OUTL Figure 13. Write Timing with Busy Input (M/S=LOW) R/W BUSY Document #: 38-06034 Rev. *G Figure 12. Read with BUSY (M/S=HIGH MATCH t PWE t SD VALID MATCH t BLA t WDD t PWE CY7C144, CY7C145 [19 BHA t BDD t DDD VALID Page ...
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... BUSY will be asserted. PS Document #: 38-06034 Rev. *G ADDRESS MATCH BLC ADDRESS MATCH BLC ADDRESS MISMATCH t t BLA BHA ADDRESS MISMATCH t t BLA BHA CY7C144, CY7C145 [28] t BHC t BHC [28] Page ...
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... INS INR Document #: 38-06034 Rev. *G Figure 16. Interrupt Timing Diagrams t WC WRITE 1FFF [29 [30] INS [30] t INR t WC WRITE 1FFE [29 [30] t INS t [30] INR ) is deasserted first R asserted last CY7C144, CY7C145 t RC READ 1FFF t RC READ 1FFE Page ...
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... TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 30.0 25.0 20.0 15.0 10 4. 25° 5.0 0 200 400 600 800 CAPACITANCE (pF) CY7C144, CY7C145 OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 200 160 120 25° 125 0 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE (V) OUTPUT SINK CURRENT vs ...
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... Ordering Information 8 K × 8 Dual-Port SRAM Speed (ns) Ordering Code 15 CY7C144-15AXC CY7C144-15JXI CY7C144-15AXI 25 CY7C144-25AXC 55 CY7C144-55AC CY7C144-55AXC CY7C144-55JC CY7C144-55JXC 8 K × 9 Dual-Port SRAM 15 CY7C145-15AXC Ordering Code Definitions CY7C 14X - Document #: 38-06034 Rev. *G Package Diagram Package Type 51-85046 64-pin Thin Quad Flat Pack (Pb-free) ...
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... Package Diagrams Figure 18. 64-Pin Thin Plastic Quad Flat Pack ( 1.4 mm), 51-85046 Document #: 38-06034 Rev. *G CY7C144, CY7C145 51-85046 *D Page ...
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... Package Diagrams (continued) Figure 19. 80-Pin Thin Plastic Quad Flat Pack, 51-85065 Figure 20. 68-Pin Plastic Leaded Chip Carrier, 51-85005 Document #: 38-06034 Rev. *G CY7C144, CY7C145 51-85065 *C 51-85005 *B Page ...
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... Document History Page Document Title: CY7C145, CY7C144 8K x 8/9 Dual-Port Static RAM with Sem, Int, Busy Document Number: 38-06034 Orig. of Rev. ECN No. Change ** 110175 SZV *A 122285 RBI *B 236752 YDT *C 393320 YIM *D 2623658 VKN/PYRS *E 2699693 VKN/PYRS *F 2896210 RAME *G 3054633 ADMU Document #: 38-06034 Rev. *G ...
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... Use may be limited by and subject to the applicable Cypress software license agreement. Document #: 38-06034 Rev. *G All products and company names mentioned in this document may be the trademarks of their respective holders. cypress.com/go/plc cypress.com/go/psoc cypress.com/go/touch cypress.com/go/USB Revised October 11, 2010 CY7C144, CY7C145 PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 | PSoC 5 ...