CY62128BLL-70ZRI Cypress Semiconductor Corp, CY62128BLL-70ZRI Datasheet

CY62128BLL-70ZRI

Manufacturer Part Number

CY62128BLL-70ZRI

Description

Manufacturer

Cypress Semiconductor Corp

Datasheets

1.CY62128BLL-70ZRI.pdf (11 pages)

2.CY62128BLL-70ZRI.pdf (13 pages)

Specifications of CY62128BLL-70ZRI

Density

1Mb

Access Time (max)

70ns

Operating Supply Voltage (typ)

Package Type

TSOP

Operating Temp Range

-40C to 85C

Supply Current

15mA

Operating Supply Voltage (min)

4.5V

Operating Supply Voltage (max)

5.5V

Operating Temperature Classification

Industrial

Mounting

Surface Mount

Pin Count

Word Size

Lead Free Status / Rohs Status

Not Compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

CY62128BLL-70ZRI

Manufacturer:

CYPRESS

Quantity:

191

Current page: 1 of 11
Download datasheet (302Kb)

Cypress Semiconductor Corporation

Document #: 38-05300 Rev. *C

Features

Note:

Logic Block Diagram

• Temperature Ranges

• 4.5V–5.5V operation

• CMOS for optimum speed/power

• Low active power

• Low standby power

• Automatic power-down when deselected

• TTL-compatible inputs and outputs

• Easy memory expansion with CE

(70 ns, LL version, Commercial, Industrial)

— Commercial: 0°C to 70°C

— Industrial: –40°C to 85°C

— Automotive: –40°C to 125°C

— 82.5 mW (max.) (15 mA)

— 110 µW (max.) (15 µA)

For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.

CE 1

CE 2

A 0

A 1

A 2

A 3

A 4

A 5

A 6

A 7

A 8

, CE

•

, and OE options

INPUT BUFFER

3901 North First Street

512x 256x 8

DECODER

ARRAY

COLUMN

POWER

DOWN

Functional Description

The CY62128B is a high-performance CMOS static RAM

organized as 131,072 words by 8 bits. Easy memory

expansion is provided by an active LOW Chip Enable (CE

an active HIGH Chip Enable (CE

Enable (OE), and three-state drivers. This device has an

automatic

consumption by more than 75% when deselected.

Writing to the device is accomplished by taking Chip Enable

One (CE

Enable Two (CE

through I/O

address pins (A

Reading from the device is accomplished by taking Chip

Enable One (CE

Write Enable (WE) and Chip Enable Two (CE

these conditions, the contents of the memory location

specified by the address pins will appear on the I/O pins.

The eight input/output pins (I/O

high-impedance state when the device is deselected (CE

HIGH or CE

during a write operation (CE

The CY62128B is available in a standard 450-mil-wide SOIC,

32-pin TSOP type I and STSOP packages.

1-Mbit (128K x 8) Static RAM

•

) and Write Enable (WE) inputs LOW and Chip

) is then written into the location specified on the

power-down

LOW), the outputs are disabled (OE HIGH), or

San Jose

) input HIGH. Data on the eight I/O pins (I/O

) and Output Enable (OE) LOW while forcing

through A

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

CA 95134

feature

LOW, CE

[1]

through I/O

), an active LOW Output

that

Revised March 7, 2005

HIGH, and WE LOW).

•

reduces

CY62128B

) are placed in a

) HIGH. Under

408-943-2600

MoBL

power

[+] Feedback

Related parts for CY62128BLL-70ZRI

Related keywords

CY62128BLL-70ZRI datasheet
CY62128BLL-70ZRI data sheet
CY62128BLL-70ZRI pdf datasheet
CY62128BLL-70ZRI component
CY62128BLL-70ZRI part
CY62128BLL-70ZRI distributor
CY62128BLL-70ZRI RoHS
CY62128BLL-70ZRI datasheet download