CY62157DV18LL-55BVI Cypress Semiconductor Corp, CY62157DV18LL-55BVI Datasheet - Page 4
![](/photos/40/56/405637/42848vfbga_sml.jpg)
CY62157DV18LL-55BVI
Manufacturer Part Number
CY62157DV18LL-55BVI
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY62157DV18LL-55BVI.pdf
(10 pages)
Specifications of CY62157DV18LL-55BVI
Density
8Mb
Access Time (max)
55ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
1.8V
Address Bus
19b
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Number Of Ports
1
Supply Current
20mA
Operating Supply Voltage (min)
1.65V
Operating Supply Voltage (max)
1.95V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Word Size
16b
Number Of Words
512K
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY62157DV18LL-55BVI
Manufacturer:
CY
Quantity:
80
Company:
Part Number:
CY62157DV18LL-55BVI
Manufacturer:
CYPRESS
Quantity:
173
Thermal Resistance
AC Test Loads and Waveforms
Data Retention Characteristics
Data Retention Waveform
Notes:
Document #: 38-05126 Rev. *B
V
I
t
t
7.
8.
CCDR
CDR
R
JA
JC
Parameter
DR
[7]
Parameter
BHE . BLE
Full device operation requires linear V
BHE
[6]
CE
CE
.
1
or
BLE is the AND of both BHE and BLE. Chip can be deselected by either disabling the chip enable signals or by disabling both BHE and BLE.
V
or
CC
2
Parameters
Thermal Resistance (Junction to
Ambient)
Thermal Resistance (Junction to
Case)
OUTPUT
V
Data Retention Current
Chip Deselect to Data
Retention Time
Operation Recovery Time
CC
R
V
R1
R2
T H
T H
[6]
V
INCLUDING
for Data Retention
CC
C = 30 pF
[6]
JIG AND
Equivalent to:
L
SCOPE
Description
Description
[8]
CC
R1
ramp from V
OUTPUT
V
CC(min.)
t
CDR
THÉVENIN EQUIVALENT
DR
R2
V
< 0.2V, V
0.2V
to V
CC
CC(min.)
Still Air, soldered on a 3 x 4.5 inch, two-layer
printed circuit board
= 1.0V, CE
V
CC
IN
DATA RETENTION MODE
> 100 s or stable at V
R
GND
TH
> V
Typ
13500
10800
6000
1.8V
0.80
Rise Time:
1 V/ns
Conditions
CC
1
> V
Test Conditions
V
DR
10%
0.2V or V
CC
V
> 1.0V
– 0.2V, CE
CC(min.)
ALL INPUT PULSES
IN
90%
<
> 100 s.
2
L
LL
Min.
1.0
t
RC
V
0
CC(min.)
t
R
90%
Fall Time:
Typ.
10%
1 V/ns
BGA
1
55
16
UNIT
[5]
V
CY62157DV18
Max.
1.95
10
3
MoBL2
Page 4 of 10
Unit
C/W
C/W
Unit
ns
ns
V
A
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