CY7C1021BV33L-12ZC Cypress Semiconductor Corp, CY7C1021BV33L-12ZC Datasheet
CY7C1021BV33L-12ZC
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CY7C1021BV33L-12ZC Summary of contents
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... Note: 1. For guidelines on SRAM system design, please refer to the ‘System Design Guidelines’ Cypress application note, available on the internet at www.cypress.com. Cypress Semiconductor Corporation Document #: 38-05148 Rev. *A Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable ...
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Pin Configurations Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C [2] Supply Voltage Relative GND ...
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Electrical Characteristics Over the Operating Range Parameter Description Test Conditions V Output HIGH V = Min Voltage I = –4 Output LOW V = Min Voltage V Input HIGH IH Voltage V ...
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Switching Characteristics Over the Operating Range Parameter Description READ CYCLE t Read Cycle Time RC t Address to Data Valid AA t Data Hold from Address Change OHA t CE LOW to Data Valid ACE t OE LOW to ...
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Data Retention Waveform Switching Waveforms [11, 12] Read Cycle No. 1 ADDRESS DATA OUT PREVIOUS DATA VALID [12, 13] Read Cycle No. 2 (OE Controlled) ADDRESS CE t ACE OE t DOE BHE, BLE t LZOE t ...
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Switching Waveforms (continued) [14, 15] Write Cycle No. 1 (CE Controlled) ADDRESS BHE, BLE DATA I/O Write Cycle No. 2 (BLE or BHE Controlled) ADDRESS t SA BHE, BLE WE CE DATA I/O Notes: 14. Data ...
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Switching Waveforms (continued) Write Cycle No. 3 (WE Controlled, LOW) ADDRESS BHE, BLE DATA I/O Truth Table BLE BHE I High Data ...
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... Ordering Code 8 CY7C1021BV33-8BAC CY7C1021BV33-8VC CY7C1021BV33L-8VC CY7C1021BV33-8ZC CY7C1021BV33L-8ZC 10 CY7C1021BV33-10BAC CY7C1021BV33-10VC CY7C1021BV33L-10VC CY7C1021BV33-10ZC CY7C1021BV33L-10ZC 12 CY7C1021BV33-12BAC CY7C1021BV33-12VC CY7C1021BV33L-12VC CY7C1021BV33-12ZC CY7C1021BV33L-12ZC CY7C1021BV33-12BAI CY7C1021BV33-12VI 15 CY7C1021BV33-15BAC CY7C1021BV33L-15BAC CY7C1021BV33-15VC CY7C1021BV33L-15VC CY7C1021BV33-15ZC CY7C1021BV33L-15VC CY7C1021BV33-15BAI CY7C1021BV33L-15BAI CY7C1021BV33-15VI CY7C1021BV33L-15ZI Shaded areas contain advance information. Document #: 38-05148 Rev. *A Package Name Package Type BA48A 48-Ball Mini Ball Grid Array (7 ...
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Package Diagrams 48-Ball (7. 7. 1.2 mm) FBGA BA48A Document #: 38-05148 Rev. *A CY7C1021BV33 51-85096-*E Page [+] Feedback ...
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... Document #: 38-05148 Rev. *A © Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user ...
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Document History Page Document Title: CY7C1021BV33 64K x 16 Static RAM Document Number: 38-05148 Issue Orig. of REV. ECN NO. Date Change ** 109892 09/22/01 *A 116474 09/16/02 Document #: 38-05148 Rev. *A Description of Change SZV Change from Spec ...