CY7C188-35VC Cypress Semiconductor Corp, CY7C188-35VC Datasheet - Page 4

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CY7C188-35VC

Manufacturer Part Number
CY7C188-35VC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C188-35VC

Density
288Kb
Access Time (max)
35ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
5V
Address Bus
15b
Package Type
SOJ
Operating Temp Range
0C to 70C
Number Of Ports
1
Supply Current
160mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
32
Word Size
9b
Number Of Words
32K
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C188-35VC
Manufacturer:
CYPRESS
Quantity:
1 086
Part Number:
CY7C188-35VC
Manufacturer:
TI
Quantity:
221
Switching Characteristics
Switching Waveforms
Document #: 38-05053 Rev. **
Notes:
Read Cycle No. 1
Read Cycle No. 2 (Chip-Enable Controlled)
Write Cycle No. 1 (WE Controlled)
Parameter
5.
6.
7.
8.
9.
DATA OUT
DATA OUT
CURRENT
ADDRESS
SUPPLY
Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
I
t
At any given temperature and voltage condition, t
The internal write time of the memory is defined by the overlap of CE
signal can terminate a write by being deasserted. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
The minimum write cycle time for write cycle #3 (WE controlled, OE LOW) is the sum of t
OL
HZOE
/I
OH
CE
V
, t
OE
CC
HZCE
and 30-pF load capacitance.
1
, and t
HZWE
[10,11]
are specified with C
PREVIOUS DATA VALID
HIGH IMPEDANCE
t
Description
PU
t
LZCE
Over the Operating Range
L
t
t
[8,13,14,15]
LZOE
ACE
= 5 pF as in part (b) of AC Test Loads. Transition is measured 500 mV from steady-state voltage.
t
OHA
50%
t
DOE
HZCE
[11,12,13]
is less than t
t
AA
LZCE
Min.
t
RC
7C188–15
1
, LOW, CE
[2, 5]
, t
HZOE
Max.
is less than t
t
2
RC
HIGH, and WE LOW. All three signals must be asserted to initiate a write and any
HZWE
Min.
7C188–20
LZOE
DATA VALID
and t
, and t
SD
Max.
.
HZWE
is less than t
Min.
7C188–25
DATA VALID
LZWE
Max.
for any given device.
t
t
HZOE
HZCE
t
PD
Min.
7C188–35
50%
CY7C188
IMPEDANCE
Max.
HIGH
Page 4 of 8
C188–5
C188–6
Unit
ICC
ISB

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