CYNSE70064A-83BGC Cypress Semiconductor Corp, CYNSE70064A-83BGC Datasheet - Page 14

• Manufacturer Part Number: CYNSE70064A-83BGC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYNSE70064A-83BGC

• Operating Supply Voltage (typ): 1.8V
• Operating Supply Voltage (min): 1.7V
• Operating Supply Voltage (max): 1.9V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Package Type: BGA
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

7.2
The device contains 16 68-bit global mask registers (eight pairs) dynamically selected in every Search operation to select the
Search subfield. The addressing of these registers is explained in Figure 7-2. The three-bit GMR Index supplied on the command
(CMD) bus can apply eight pairs of global masks during the Search and Write operations, as shown below. Note. In 68-bit Search
and Write operations, the host ASIC must program both the even and odd mask registers with the same values.
Each mask bit in the GMRs is used during Search and Write operations. In Search operations, setting the mask bit to 1 enables
compares; setting the mask bit to 0 disables compares (forced match) at the corresponding bit position. In Write operations to
the data or mask array, setting the mask bit to 1 enables Writes; setting the mask bit to 0 disables Writes at the corresponding
bit position.
7.3
The device contains eight search successful registers (SSRs) to hold the index of the location where a successful Search
occurred. The format of each register is described in Table 7-2. The Search command specifies which SSR stores the index of
a specific Search command in cycle B of the Search instruction. Subsequently, the host ASIC can use this register to access that
data array, mask array, or external SRAM using the index as part of the indirect access address (see Table 10-4 and Table 10-7).
The device with a valid bit set performs a Read or Write operation. All other devices suppress the operation.
Table 7-2. Search Successful Register Description
Document #: 38-02041 Rev. *F
INDEX
VALID
Field
–
–
Mask Registers
Search Successful Registers (SSR[0:7])
Range
[30:15]
[67:32]
[14:0]
[31]
Figure 7-1. Comparand-Register Selection During Search and Learn Instructions
Initial Value
Figure 7-2. Addressing the Global Masks Register Array
Search and Write Command Global Mask Selection
X
0
0
0
Index
Index. This is the address of the 68-bit entry where a successful Search occurs.
The device updates this field only when the Search is successful. If a hit occurs
in a 136-bit entry-size quadrant, the LSB is 0. If a hit occurs in a 272-bit entry-size
quadrant, the two LSBs are 00. This index updates if the device is either a local
or global winner in a Search operation.
Reserved.
Valid. During Search operation in a depth-cascaded configuration, the device
that is a global winner in a match sets this bit to 1. This bit updates only when
the device is a global winner in a Search operation.
Reserved.
Address
index
0
1
2
3
4
5
6
7
15
0
1
135
135
68
30
0
2
4
6
10
12
14
68
0
2
4
6
8
68
31
1
3
5
7
68
13
15
11
1
3
5
7
9
0
0
Description
CYNSE70064A
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