AM28F512-150JC AMD (ADVANCED MICRO DEVICES), AM28F512-150JC Datasheet - Page 2

• Manufacturer Part Number: AM28F512-150JC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM28F512-150JC

• Lead Free Status / Rohs Status: Not Compliant

write cycles, the command register internally latches
address and data needed for the programming and
erase operations. For system design simplification, the
Am28F512 is designed to support either WE# or CE#
controlled writes. During a system write cycle, ad-
dresses are latched on the falling edge of WE# or CE#
whichever occurs last. Data is latched on the rising edge
of WE# or CE# whichever occurs first. To simplify the fol-
lowing discussion, the WE# pin is used as the write cycle
control pin throughout the rest of this text. All setup and
hold times are with respect to the WE# signal.
BLOCK DIAGRAM
A0–A15
PRODUCT SELECTOR GUIDE
2
Family Part Number
Speed Options (V
Max Access Time (ns)
CE# (E#) Access (ns)
OE# (G#) Access (ns)
WE#
V
V
V
OE#
CE#
CC
SS
PP
Low V
Detector
CC
Command
CC
Register
Control
State
= 5.0 V
10%)
Program/Erase
Pulse Timer
Program
Voltage
Switch
Voltage
Switch
Erase
Am28F512
Address
-70
Latch
70
70
35
To Array
AMD’s Flash technology combines years of EPROM
and EEPROM experience to produce the highest levels
of quality, reliability, and cost effectiveness. The
Am28F512 electrically erases all bits simultaneously
using Fowler-Nordheim tunneling. The bytes are pro-
grammed one byte at a time using the EPROM
programming mechanism of hot electron injection.
Output Enable
Chip Enable
Y-Decoder
X-Decoder
Logic
-90
90
90
35
Am28F512
-120
120
120
50
Input/Output
Cell Matrix
DQ0–DQ7
Y-Gating
524,288
Buffers
Latch
Data
Bit
-150
150
150
55
11561G-1
-200
200
200
55