M48T18-100MH1 STMicroelectronics, M48T18-100MH1 Datasheet - Page 13

RAM Miscellaneous 8KX8 TIMEKEEP 100NS

M48T18-100MH1

Manufacturer Part Number
M48T18-100MH1
Description
RAM Miscellaneous 8KX8 TIMEKEEP 100NS
Manufacturer
STMicroelectronics
Datasheet

Specifications of M48T18-100MH1

Bus Type
Parallel
Date Format
DW:DM:M:Y
Time Format
HH:MM:SS
User Ram
8KB
Operating Supply Voltage (typ)
5V
Package Type
SOH
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
28
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant

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M48T08, M48T08Y, M48T18
2.3
Note:
Note:
2.4
Data retention mode
With valid V
RAM. Should the supply voltage decay, the RAM will automatically power-fail deselect, write
protecting itself when V
become high impedance, and all inputs are treated as “Don't care.”
A power failure during a WRITE cycle may corrupt data at the currently addressed location,
but does not jeopardize the rest of the RAM's content. At voltages below V
user can be assured the memory will be in a write protected state, provided the V
is not less than t
reach into the deselect window during the time the device is sampling V
decoupling of the power supply lines is recommended.
When V
preserves data and powers the clock. The internal button cell will maintain data in the
M48T08/18/08Y for an accumulated period of at least 10 years when V
Requires use of M4T32-BR12SH SNAPHAT
As system power returns and V
power supply is switched to external V
Write protection continues until V
high or E2 low as V
system stabilization. Normal RAM operation can resume t
For more information on battery storage life refer to the application note AN1012.
Power-fail interrupt pin
The M48T08/18/08Y continuously monitors V
point, an interrupt is immediately generated. An internal clock provides a delay of between
10 µs and 40 µs before automatically deselecting the M48T08/18/08Y. The INT pin is an
open drain output and requires an external pull-up resistor, even if the interrupt output
function is not being used.
CC
drops below V
CC
applied, the M48T08/18/08Y operates as a conventional BYTEWIDE™ static
F
. The M48T08/18/08Y may respond to transient noise spikes on V
CC
rises past V
CC
SO
falls within the V
, the control circuit switches power to the internal battery which
Doc ID 2411 Rev 10
CC
CC
PFD
rises above V
reaches V
CC
(min) to prevent inadvertent WRITE cycles prior to
.
PFD
®
CC
top when using the SOH28 package.
PFD
(max), V
. When V
SO
(min) plus t
, the battery is disconnected and the
PFD
CC
rec
(min) window. All outputs
falls to the power-fail detect trip
after V
rec
(min). E1 should be kept
CC
exceeds V
CC
CC
Operation modes
is less than V
. Therefore,
PFD
(min), the
CC
PFD
CC
fall time
(max).
that
13/31
SO
.

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