LM81CIMT-3 National Semiconductor, LM81CIMT-3 Datasheet - Page 20

• Manufacturer Part Number: LM81CIMT-3
• Manufacturer: National Semiconductor

Specifications of LM81CIMT-3

• Monitored Voltage 1 (typ): 2.5/3.3/5/12V
• Battery Backup Switching: No
• Watchdog Timer: Yes
• Chip Enable Signals: No
• Manual Reset: No
• Package Type: TSSOP
• Operating Supply Voltage (min): 2.8V
• Operating Supply Voltage (max): 3.8V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Power Fail Detection: No
• Mounting: Surface Mount
• Pin Count: 24
• Lead Free Status / Rohs Status: Not Compliant

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Functional Description
8.2 Temperature Interrupts
INT and T_CRIT_A outputs are provided for temperature
interrupt. Temperature interrupts have a normal and an ex-
tended option of operation. Each option has three different
modes of operation: Repetitive Interrupt, One-Time Interrupt
and Comparator.
Normal Repetitive Interrupt Mode is shown in Figure 11
and operates in the following way: T_CRIT_A is disabled.
Exceeding T
indefinitely until reset by reading Interrupt Status Register 1.
Once reset if the temperature remains above the T
setpoint the interrupt will again be activated at the comple-
tion of another conversion cycle. If temperature is less than
or equal to T
*
Note: Interrupt resets occur only when interrupt Status Register 1 is read.
FIGURE 11. Normal Repetitive Interrupt Response
HIGH
HIHYST
causes an interrupt that will remain active
the interrupt will not be activated.
Diagram
(Continued)
DS100072-16
HIHYST
20
Normal One-Time Interrupt Mode is shown in Figure 12
and operates in the following way: T_CRIT_A is disabled.
Exceeding T
indefinitely until reset by reading Interrupt Status Register 1.
Another interrupt will not occur until the temperature drops to
less than or equal to T
a subsequent conversion. After power up this mode is se-
lected as default.
*
Normal Comparator Mode is shown in Figure 13 and op-
erates in the following way: T_CRIT_A is disabled. Exceed-
ing T
the temperature is less than or equal to T
disabled.
*
Note: Interrupt resets occur only when interrupt Status Register 1 is read.
Note: Interrupt resets occur only when interrupt Status Register 1 is read.
FIGURE 12. One-Time Interrupt Response Diagram
HIGH
FIGURE 13. Normal Comparator Mode
causes an interrupt that will remain activated until
HIGH
causes an interrupt that will remain active
HIHYST
and then exceeds T
HIGH
DS100072-18
DS100072-17
HIGH
. T
LOW
during
is