LM81CIMT-3 National Semiconductor, LM81CIMT-3 Datasheet - Page 28

• Manufacturer Part Number: LM81CIMT-3
• Manufacturer: National Semiconductor

Specifications of LM81CIMT-3

• Monitored Voltage 1 (typ): 2.5/3.3/5/12V
• Battery Backup Switching: No
• Watchdog Timer: Yes
• Chip Enable Signals: No
• Manual Reset: No
• Package Type: TSSOP
• Operating Supply Voltage (min): 2.8V
• Operating Supply Voltage (max): 3.8V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Power Fail Detection: No
• Mounting: Surface Mount
• Pin Count: 24
• Lead Free Status / Rohs Status: Not Compliant

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0-6
Bit
Bit
0
1
2
3
4
5
6
7
7
Functional Description
13.7 Interrupt Mask Register 2 — Address 44h
Power on default –
13.8 Reserved Register — Address 45h
Power on default –
13.9 CI Clear Register — Address 46h
Power on default –
+12Vin
Vccp2
Reserved
Reserved
Chassis Intrusion
Reserved
Reserved
RESET Enable
Reserved
CI Clear
Name
Name
<
<
<
7:0
7:0
7:0
>
>
>
= 0000 0000 binary
= 00h. Read/Write for backwards compatibility.
= 0000 0000 binary
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/
Read/
Write
Write
(Continued)
A one disables the corresponding interrupt status bit for INT interrupt.
A one disables the corresponding interrupt status bit for INT interrupt.
A one disables the corresponding interrupt status bit for INT interrupt.
A one outputs a minimum 20 ms active low pulse on the Chassis Intrusion pin. The
register bit self clears after the pulse has been output. This bit is mirrored in
Configuration Register bit 6.
<
7
>
= 1 in INT Mask Register 2 enables the RESET in the Configuration Register.
28
Description
Description