RC28F256P30B85 Micron Technology Inc, RC28F256P30B85 Datasheet - Page 87

• Manufacturer Part Number: RC28F256P30B85
• Manufacturer: Micron Technology Inc

Specifications of RC28F256P30B85

• Cell Type: NOR
• Density: 256Mb
• Access Time (max): 85/17ns
• Interface Type: Parallel/Serial
• Boot Type: Bottom
• Address Bus: 24b
• Operating Supply Voltage (typ): 1.8V
• Operating Temp Range: -40C to 85C
• Package Type: EZBGA
• Program/erase Volt (typ): 1.7 to 2/8.5 to 9.5V
• Sync/async: Async/Sync
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 1.7V
• Operating Supply Voltage (max): 2V
• Word Size: 16b
• Number Of Words: 16M
• Supply Current: 28mA
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / Rohs Status: Not Compliant

P30
Figure 41: Protection Register Programming Flowchart
A.3
August 2008
Order Number: 306666-12
Address & Data
Register Data
Read Status
Read Status
PR Address
Write 0xC0,
Full Status
(if desired)
Successful
Complete
Write PR
Register
Program
Program
SR[7] =
SR[3] =
SR[4] =
SR[1] =
Check
Start
1
0
0
0
0
1
1
1
Write State Machine
Figure 42
based on incoming commands. Only one partition can be actively programming or
erasing at a time. Each partition stays in its last read state (Read Array, Read Device
ID, Read CFI or Read Status Register) until a new command changes it. The next WSM
state does not depend on the partition’s output state.
(Program Setup)
(Confirm Data)
PROTECTION REGISTER PROGRAMMING PROCEDURE
Register Locked;
Program Aborted
V
Program Error
PP
Range Error
through
FULL STATUS CHECK PROCEDURE
Figure 47
Operation
Program Protection Register operation addresses must be
within the Protection Register address space. Addresses
outside this space will return an error.
Repeat for subsequent programming operations.
Full Status Register check can be done after each program, or
after a sequence of program operations.
Write 0xFF after the last operation to set Read Array state.
Operation
Only the Clear Staus Register command clears SR[1, 3, 4].
If an error is detected, clear the Status register before
attempting a program retry or other error recovery.
show the command state transitions (Next State Table)
Write
Write
Read
Bus
Bus
Idle
Idle
Idle
Idle
Command
Command
Protection
PR Setup
Program
Program
None
None
None
None
None
Data = 0xC0
Addr = First Location to Program
Data = Data to Program
Addr = Location to Program
Status Register Data.
Check SR[7]:
1 = WSM Ready
0 = WSM Busy
Check SR[3]:
1 =V
Check SR[4]:
1 =Programming Error
Check SR[1]:
1 =Block locked; operation aborted
PP
Range Error
Comments
Comments
Datasheet
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