OQ2536HP NXP Semiconductors, OQ2536HP Datasheet - Page 8

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OQ2536HP

Manufacturer Part Number
OQ2536HP
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of OQ2536HP

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Pin Count
100
Mounting
Surface Mount
Lead Free Status / Rohs Status
Supplier Unconfirmed
Philips Semiconductors
where:
As long as R
including environmental conditions like air flow and board
layout, no heatsink is necessary. For example if
T
which is more than the worst case R
heatsink is necessary.
Another example; if for safety reasons T
low as 110 C, while T
In this case extra cooling is needed. The thermal
resistance of the heatsink is calculated as follows:
where:
Table 1 BST identifier code
Notes
1. LSB is shifted out first on the TDO pin.
2. The manufacturer’s code was implemented incorrectly. It should have been 0000 0010 101.
1998 Mar 10
j
VERSION
R
T
T
R
R
R
= 120 C, T
SDH/SONET STM16/OC48 demultiplexer
in the application
j
amb
th
th h-a
th c-h
th j-c
= junction temperature
0001
R
= total thermal resistance from junction to ambient
thh a
= ambient temperature.
R
R
= thermal resistance from junction to case,
= thermal resistance from case to heatsink
= thermal resistance from heatsink to ambient
th
th
see Chapter “Thermal characteristics”.
=
=
th
amb
---------------------------- -
---------------------------- -
is greater than R
120 70
110 85
------- -
R
1
= 70 C and P
1.45
th
2.0
OQ
01
---------------- -
R
amb
thj a
1
= 85 C and P
=
=
34.4
12.5
1
th j-a
tot
R
= 1.45 W, then:
thj c
of the OQ2536HP
th j-a
00 1001 1110 1000
2536 (BINARY)
j
tot
K W
K W
= 33 K/W, so no
should stay as
R
= 2 W, then:
thc h
(2)
(3)
(4)
8
If for instance R
Built in temperature sensor
Three series-connected diodes have been integrated for
measuring junction temperature. The diode array,
accessed by means of the DIOA (anode) and DIOC
(cathode) pins, has a temperature dependency of
approximately 6 mV/ C. With a diode current of 1 mA,
the voltage will be somewhere in the range 1.7 to 2.5 V,
depending on temperature.
Boundary Scan Test (BST) interface
Boundary scan test logic has been implemented for all
digital inputs and outputs on the low frequency interface, in
accordance with “IEEE Std 1149.1-1990” . All scan tests
other than SAMPLE mode are available. The boundary
scan test logic consists of a TAP controller, a BYPASS
register, a 2-bit instruction register, a 32-bit identification
register and a 36-bit boundary scan register (the last two
are combined). The architecture of the TAP controller and
the BYPASS register is in accordance with IEEE
recommendations.
The four command modes, selected be means of the
instruction register, are: EXTEST (00), PRELOAD (01),
IDCODE (10) and BYPASS (11).
All boundary scan test inputs, TDI, TMS, TCK and TRST,
have internal pull up resistors. The maximum test clock
frequency at TCK is 12 MHz.
R
thh a
PHILIPS SEMICONDUCTORS
---------- -
12.5
1
th c-h
0000 0011 101
----- -
33
= 0.5 K/W and R
1
1
3.1
(2)
17.0
Product specification
th j -a
OQ2536HP
= 33 K/W then:
K W
LSB
1
(1)
(5)

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