KS8695 Micrel Inc, KS8695 Datasheet - Page 20

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KS8695

Manufacturer Part Number
KS8695
Description
Manufacturer
Micrel Inc
Datasheet

Specifications of KS8695

Operating Supply Voltage (typ)
2.5/3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
208
Lead Free Status / Rohs Status
Not Compliant

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KS8993
VLANs. If vmdis = 1, port 1 can never talk to port 2. Port 3 has to route all the traffic across the two VLANs. If vmdis = 0 and
there are unicast packets, all ports can talk to all others. If vmdis = 0 and there are multicast packets, those packets are confined
in the same VLAN. The router can take advantage of the “vmdis = 0” feature, acting as an agent to handle broadcast/multicast
protocol, while leaving unicast switching task to KS8993. For example, port 1 sends an “ARP” for the port 2 MAC address. Since
port 2 cannot receive the ARP, the attached router on port 3 will act as an agent and report the MAC address of port 2 to port
1. Then all the unicast traffic between port 1 and port 2 could be switched by KS8993, instead of by the router port. This
application could enable “wire speed” switching/routing. This feature is sometimes called “leaky VLAN”. This leaky VLAN does
improve the system performance by separating broadcast domains. Note KS8993 does not support “duplicated MAC
addresses” in different VLANs to save MAC table size.
QoS Priority Support
This feature provides QoS for applications such as VOIP, video conferencing, and mission critical applications. The KS8993
per port transmit queue could be split into two priority queues, high priority and low priority queues. The splitting feature could
be optionally per port enabled (using pin Px_TXQ2). If a port is split, high priority packets will be put in the high priority queue.
If a port’s transmit queue is not split, high priority and low priority packets will be treated equally. There are four priority schemes
(selected by pins PRSEL1 and PRSEL0): (1), transmit high priority packets always before low priority packets, i.e. A low priority
packet could be transmitted only when the high priority queue is empty. (2), 10/1 ratio, transmit a low priority after every 10
high priority packets transmitted if both queues are busy. (3), 5/1 ratio, (4) 2/1 ratio. Incoming packet priority could be classified
in two ways, port-based or 802.1p.
Port based priority: Each port could be individually specified as a high priority receiving port (using pin Px_PP). All the packets
received at the high priority receiving port will be marked high priority and sent to the high priority transmit queue if the
corresponding queue is split.
802.1p based priority: 802.1p based priority could be enabled by pins Px_1PEN. KS8993 will examine incoming packets to
determine whether they are tagged and retrieve the corresponding priority information. The priority field in the VLAN tag is 3
bits wide and is compared against “priority base value specified by pins (PBASE[2:0]). If a received packet has an equal or
larger priority value than the “priority base” value, the packet will be put in the high priority transmit queue if the corresponding
queue is split. KS8993 can optionally remove or insert priority tagged frame’s header (2 bytes of tag protocol identifier 0x8100
and 2 bytes of tag control information). If a transmitting port has its corresponding Px_TAGINS set (meaning tag insertion),
the transmitting logic will automatically insert “priority tag” for untagged packets with NULL VLAN ID and its priority value (7
for high priority and 0 for low priority). For already tagged packets, KS8993 will pass the original packet without changing its
tag content. If a transmitting port has its corresponding Px_TAGRM set (meaning tag removal), the transmitting logic will
automatically remove “802.1q tag”. For untagged packets, KS8993 will pass the original packet without changing any content.
Either tag insertion or removal will cause CRC recalculation.
KS8993
In the above setting, there are two VLANs. VLAN 1 includes ports 1,3 and VLAN 2 includes ports 2, 3. Port 3 belongs to both
P1_V : (1,0,1)
P2_V : (1,1,0)
P3_V : (1,1,1)
20
April 2009
Micrel

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