KS8695 Micrel Inc, KS8695 Datasheet - Page 21

• Manufacturer Part Number: KS8695
• Manufacturer: Micrel Inc

Specifications of KS8695

• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 208
• Lead Free Status / Rohs Status: Not Compliant

MII Interface Operation
The MII (Media Independent Interface) operates in either a forward or reverse mode. In the forward mode, the KS8993 MII acts
like a MAC and in the reverse mode, it acts like a PHY device. This interface is specified by the IEEE 802.3 committee and
provides a common interface between physical layer and MAC layer devices. There are two distinct groups, one being for
transmission and the other for receiving. The table below describes the signals used in this interface in forward and reverse
modes.
This interface is a nibble wide data interface and therefore runs at 1/4 the network bit rate (not encoded). Additional signals
on the transmit side indicate when data is valid or when an error occurs during transmission. Likewise, the receive side has
indicators that convey when the data is valid and without physical layer errors.
For half-duplex operation there is a signal that indicates a collision has occurred during transmission.
Note that the signal MRXER is not provided on the MII interface for the KS8993 for reverse operation and MTXER is not
represented for forward mode. Normally this would indicate a receive / transmit error coming from the physical layer /MAC
device, but is not appropriate for this configuration. If the connecting device has a MRXER pin, this should be tied low on the
other device for reverse or if it has a MTXER pin in the forward mode it should also be tied low on the other device.
April 2009
KS8993
Reverse MII Mode Connection
External MAC
MTXEN
MTXER
MTXD3
MTXD2
MTXD1
MTXD0
MTXC
MCOL
MCRS
MRXDV
MRXER
MRXD3
MRXD2
MRXD1
MRXD0
MRXC
KS8993 Signal
MTXEN
MTXER
MTXD[3]
MTXD[2]
MTXD[1]
MTXD[0]
MTXCLK
MCOL
MCRS
MRXDV
Not used
MRXD[3]
MRXD[2]
MRXD[1]
MRXD[0]
MRXCLK
Description
Transmit enable
Transmit error
Transmit data bit 3
Transmit data bit 2
Transmit data bit 1
Transmit data bit 0
Transmit clock
Collision detection
Carrier sense
Receive data valid
Receive error
Receive data bit 3
Receive data bit 2
Receive data bit 1
Receive data bit 0
Receive clock
Table 2. MII Interconnect
21
Forward MII Mode Connection
External PHY
MTXEN
MTXER
MTXD3
MTXD2
MTXD1
MTXD0
MTXC
MCOL
MCRS
MRXDV
MRXER
MRXD3
MRXD2
MRXD1
MRXD0
MRXC
KS8993 Signal
MRXDV
Not used
MRXD[3]
MRXD[2]
MRXD[1]
MRXD[0]
MTXCLK
MCOLIN
MCRS
MTXEN
MTXER
MTXD[3]
MTXD[2]
MTXD[1]
MTXD[0]
MRXCLK
KS8993
Micrel