LM63CIMA National Semiconductor, LM63CIMA Datasheet - Page 9

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LM63CIMA

Manufacturer Part Number
LM63CIMA
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of LM63CIMA

Temperature Sensor Function
Temp Sensor
Interface Type
Serial (2-Wire)
Output Type
Digital
Package Type
SOIC N
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
3V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Lead Free Status / Rohs Status
Not Compliant

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and Comparator Mode Register must be asserted. This is not
the power-on default state.
1.2.2 ALERT Output as an Interrupt
The LM63's ALERT output can be implemented as a simple
interrupt signal when it is used to trigger an interrupt service
routine. In such systems it is desirable for the interrupt flag to
repeatedly trigger during or before the interrupt service rou-
tine has been completed. Under this method of operation,
during the read of the ALERT Status Register the LM63 will
set the ALERT Mask bit in the Configuration Register if any
bit in the ALERT Status Register is set, with the exception of
Busy and Open. This prevents further ALERT triggering until
the master has reset the ALERT Mask bit, at the end of the
interrupt service routine. The ALERT Status Register bits are
cleared only upon a read command from the master (see
Figure 4
version if the triggering condition(s) persist(s). In order for the
ALERT to be used as a dedicated interrupt signal, the Com-
parator Mode bit in the Remote Diode Temperature Filter and
Comparator Mode Register must be set low. This is the pow-
er-on default state. The following sequence describes the
response of a system that uses the ALERT output pin as an
interrupt flag:
1.
2.
3.
4.
5.
FIGURE 3. ALERT Output as Temperature Comparator
Master senses ALERT low.
Master reads the LM63 ALERT Status Register to
determine what caused the ALERT.
LM63 clears ALERT Status Register, resets the ALERT
HIGH and sets the ALERT Mask bit in the Configuration
Register.
Master attends to conditions that caused the ALERT to
be triggered. The fan is started, setpoint limits are
adjusted, etc.
Master resets the ALERT Mask bit in the Configuration
Register.
) and will be re-asserted at the end of the next con-
Response Diagram
20057007
9
1.2.3 ALERT Output as an SMBus ALERT
An SMBus alert line is created when the ALERT output is
connected to: (1) one or more ALERT outputs of other SMBus
compatible devices, and (2) to a master. Under this imple-
mentation, the LM63's ALERT should be operated using the
ARA (Alert Response Address) protocol. The SMBus 2.0 ARA
protocol, defined in the SMBus specification 2.0, is a proce-
dure designed to assist the master in determining which part
generated an interrupt and to service that interrupt.
The SMBus alert line is connected to the open-drain ports of
all devices on the bus, thereby AND'ing them together. The
ARA method allows the SMBus master, with one command,
to identify which part is pulling the SMBus alert line LOW. It
also prevents the part from pulling the line LOW again for the
same triggering condition. When an ARA command is re-
ceived by all devices on the bus, the devices pulling the
SMBus alert line LOW: (1) send their address to the master
and (2) release the SMBus alert line after acknowledgement
of their address.
The SMBus Specifications 1.1 and 2.0 state that in response
to and ARA (Alert Response Address) “after acknowledging
the slave address the device must disengage its ALERT pull-
down”. Furthermore, “if the host still sees ALERT low when
the message transfer is complete, it knows to read the ARA
again.” This SMBus “disengaging ALERT requirement pre-
vents locking up the SMBus alert line. Competitive parts may
address the “disengaging of ALERT” differently than the
LM63 or not at all. SMBus systems that implement the ARA
protocol as suggested for the LM63 will be fully compatible
with all competitive parts.
The LM63 fulfills “disengaging of ALERT” by setting the
ALERT Mask Bit in the Configuration Register after sending
out its address in response to an ARA and releasing the
ALERT output pin. Once the ALERT Mask bit is activated, the
ALERT output pin will be disabled until enabled by software.
In order to enable the ALERT the master must read the
ALERT Status Register, during the interrupt service routine
and then reset the ALERT Mask bit in the Configuration Reg-
ister to 0 at the end of the interrupt service routine.
The following sequence describes the ARA response proto-
col.
1.
2.
3.
FIGURE 4. ALERT Output as an Interrupt Temperature
Master senses SMBus alert line low
Master sends a START followed by the Alert Response
Address (ARA) with a Read Command.
Alerting Device(s) send ACK.
Response Diagram
20057008
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