S29AL016D90TFI02 Spansion Inc., S29AL016D90TFI02 Datasheet - Page 26

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S29AL016D90TFI02

Manufacturer Part Number
S29AL016D90TFI02
Description
Manufacturer
Spansion Inc.
Datasheet

Specifications of S29AL016D90TFI02

Cell Type
NOR
Density
16Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Bottom
Address Bus
21/20Bit
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
2M/1M
Supply Current
35mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Compliant

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9.4
9.5
26
Word/Byte Program Command Sequence
Unlock Bypass Command Sequence
The system may program the device by word or byte, depending on the state of the BYTE# pin. Programming
is a four-bus-cycle operation. The program command sequence is initiated by writing two unlock write cycles,
followed by the program set-up command. The program address and data are written next, which in turn
initiate the Embedded Program algorithm. The system is not required to provide further controls or timings.
The device automatically generates the program pulses and verifies the programmed cell margin.
on page 30
When the Embedded Program algorithm is complete, the device then returns to reading array data and
addresses are no longer latched. The system can determine the status of the program operation by using
DQ7, DQ6, or RY/BY#. See
Any commands written to the device during the Embedded Program Algorithm are ignored. Note that a
hardware reset immediately terminates the programming operation. The Byte Program command sequence
should be reinitiated once the device has reset to reading array data, to ensure data integrity.
Programming is allowed in any sequence and across sector boundaries. A bit cannot be programmed from
a 0 back to a 1. Attempting to do so may halt the operation and set DQ5 to 1, or cause the Data# Polling
algorithm to indicate the operation was successful. However, a succeeding read will show that the data is still
0. Only erase operations can convert a 0 to a 1.
The unlock bypass feature allows the system to program bytes or words to the device faster than using the
standard program command sequence. The unlock bypass command sequence is initiated by first writing two
unlock cycles. This is followed by a third write cycle containing the unlock bypass command, 20h. The device
then enters the unlock bypass mode. A two-cycle unlock bypass program command sequence is all that is
required to program in this mode. The first cycle in this sequence contains the unlock bypass program
command, A0h; the second cycle contains the program address and data. Additional data is programmed in
the same manner. This mode dispenses with the initial two unlock cycles required in the standard program
command sequence, resulting in faster total programming time.
requirements for the command sequence.
During the unlock bypass mode, only the Unlock Bypass Program and Unlock Bypass Reset commands are
valid. To exit the unlock bypass mode, the system must issue the two-cycle unlock bypass reset command
sequence. The first cycle must contain the data 90h; the second cycle the data 00h. Addresses are don’t care
for both cycles. The device then returns to reading array data.
Figure 9.1 on page 27
on page 43
shows the address and data requirements for the byte program command sequence.
for parameters, and to
illustrates the algorithm for the program operation. See
Write Operation Status on page 31
Figure 17.5 on page 43
S29AL016D
D a t a
S h e e t
for timing diagrams.
for information on these status bits.
Table 10.1 on page 30
S29AL016D_00_A8 February 27, 2009
Erase/Program Operations
shows the
Table 10.1

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